H8SX1651 Datasheet, PDF (78/812 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 2 CPU
Example 1:
MOV.W
R0, @ER0+
When ER0 before execution is H'12345678, H'567A is written at H'12345678.
Example 2:
MOV.B
@ER0+, @ER0+
When ER0 before execution is H'00001000, H'00001000 is read and the contents is written at
H'00001001.
After execution, ER0 is H'00001002.
2.8.6 Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32
The operand value is the contents of a memory location which is pointed to by an absolute address
included in the instruction code. There are 8-bit (@aa:8), 16-bit (@aa:16), 24-bit (@aa:24), and
32-bit (@aa:32) absolute addresses.
To access the data area, the absolute address of eight bits (@aa:8), 16 bits (@aa:16), or 32 bits
(@aa:32) is used. For an 8-bit absolute address, the upper 24 bits are specified by SBR. For a 16-
bit absolute address, the upper 16 bits are sign-extended. A 32-bit absolute address can access the
entire address space.
To access the program area, the absolute address of 24 bits (@aa:24) or 32 bits (@aa:32) is used.
For a 24-bit absolute address, the upper eight bits are all assumed to be 0 (H'00).
Rev.2.00 Jun. 28, 2007 Page 54 of 784
REJ09B248-0200