H8SX1651 Datasheet, PDF (29/812 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 1 Overview
Module/
Classification Function Description
D/A converter
D/A
converter
(DAC)
• 8-bit resolution × two output channels
• Output voltage: 0 V to Vref, maximum conversion time: 10 µs
(with 20-pF load)
Timer
8-bit timer •
(TMR)
•
•
16-bit timer •
pulse unit _•
(TPU)
•
•
•
•
•
Program- •
mable pulse _•
generator
(PPG)
•
Watchdog timer Watchdog •
timer
•
(WDT)
8 bits × four channels (can be used as 16 bits × two channels)
Select from among seven clock sources (six internal clocks and
one external clock)
Allows the output of pulse trains with a desired duty cycle or
PWM signals
16 bits × six channels (general pulse timer unit)
Select from among eight counter-input clocks for each channel
Up to 16 pulse inputs and outputs
Counter clear operation, simultaneous writing to multiple timer
counters (TCNT), simultaneous clearing by compare match and
input capture possible, simultaneous input/output for registers
possible by counter synchronous operation, and up to 15-phase
PWM output possible by combination with synchronous
operation
Buffered operation, cascaded operation (32 bits × two
channels), and phase counting mode (two-phase encoder
input) settable for each channel
Input capture function supported
Output compare function (by the output of compare match
waveform) supported
16-bit pulse output
Four output groups, non-overlapping mode, and inverted output
can be set
Selectable output trigger signals; the PPG can operate in
conjunction with the data transfer controller (DTC) and the DMA
controller (DMAC)
8 bits × one channel (selectable from eight counter input clocks)
Switchable between watchdog timer mode and interval timer
mode
Rev.2.00 Jun. 28, 2007 Page 5 of 784
REJ09B248-0200