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M16C6C Datasheet, PDF (70/94 Pages) Renesas Technology Corp – RENESAS MCU
M16C/6C Group
5. Electrical Characteristics
Memory Expansion Mode and Microprocessor Mode
(in no wait state setting)
Read timing
BCLK
CSi
td(BCLK-CS)
25ns(max.)
tcyc
th(BCLK-CS)
0ns(min.)
VCC1 = VCC2 = 5 V
ADi
BHE
ALE
RD
DBi
Write timing
BCLK
CSi
td(BCLK-AD)
25ns(max.)
td(BCLK-ALE) th(BCLK-ALE)
15ns(max.)
-4ns(min.)
td(BCLK-RD)
25ns(max.)
tac1(RD-DB)
(0.5 × tcyc -45)ns(max.)
Hi-Z
tsu(DB-RD)
40ns(min.)
td(BCLK-CS)
25ns(max.)
tcyc
th(BCLK-AD)
0ns(min.)
th(RD-AD)
0ns(min.)
th(BCLK-RD)
0ns(min.)
th(RD-DB)
0ns(min.)
th(BCLK-CS)
0ns(min.)
ADi
BHE
ALE
WR
DBi
td(BCLK-AD)
25ns(max.)
th(BCLK-AD)
0ns(min.)
td(BCLK-ALE)
15ns(max.)
th(BCLK-ALE)
-4ns(min.)
td(BCLK-WR)
25ns(max.)
th(WR-AD)
(0.5 × tcyc -10)ns(min.)
th(BCLK-WR)
0ns(min.)
Hi-Z
td(BCLK-DB)
40ns(max.)
th(BCLK-DB)
0ns(min.)
tcyc =
1
f(BCLK)
td(DB-WR)
th(WR-DB)
(0.5 × tcyc -40)ns(min.) (0.5 × tcyc -10)ns(min.)
Measuring conditions
y VCC1 = VCC2 = 5 V
y Input timing voltage: VIL = 0.8 V, VIH = 2.0 V
y Output timing voltage: VOL = 0.4 V, VOH = 2.4 V
Figure 5.11 Timing Diagram
REJ03B0277-0100 Rev.1.00 Jul.15, 2009
Page 68 of 90