4554 Datasheet, PDF (62/138 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4554 Group
(5) External clock
When the external clock signal is used as the main clock (f(XIN)),
connect the XIN pin to the clock source and leave XOUT pin open.
Then, execute the CMCK instruction (Figure 52).
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using the
ceramic resonator (refer to the recommended operating condition).
Also, note that the power down mode (POF and POF2 instructions)
cannot be used when using the external clock.
(6) Sub-clock generating circuit f(XCIN)
Sub-clock signal f(XCIN) is obtained by externally connecting a
quartz-crystal oscillator. Connect this external circuit and a quartz-
crystal oscillator to pins XCIN and XCOUT at the shortest distance. A
feedback resistor is built in between pins XCIN and XCOUT (Figure
53).
(7) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
M34554
* Execute the CMCK
instruction in program.
XIN
XOUT ^VDD
VSS
External oscillation circuit
Fig. 52 External clock input circuit
M34554
Note: Externally connect a damping
resistor Rd depending on the
XC IN
XCOUT
oscillation frequency.
(A feedback resistor is built-in.)
Use the quartz-crystal manu-
Rd
facturer’s recommended value
because constants such as ca-
pacitance depend on the
CIN
COUT
resonator.
Table 18 Clock control register MR
Fig. 53 External quartz-crystal circuit
Clock control register MR
at reset : 11002
at power down : state retained
MR3
MR2
Operation mode selection bits
MR3 MR2
Operation mode
0 0 Through mode (frequency not divided)
0 1 Frequency divided by 2 mode
1 0 Frequency divided by 4 mode
1 1 _{Frequency divided by 8 mode}
MR1 Main clock oscillation circuit control bit
MR0 System clock selection bit
0
Main clock oscillation enabled
1
Main clock oscillation stop
0
Main clock (f(XIN) or f(RING))
1
Sub-clock (f(XCIN))
Note : “R” represents read enabled, and “W” represents write enabled.
R/W
TAMR/
TMRA
ROM ORDERING METHOD
1.Mask ROM Order Confirmation Form•
2.Mark Specification Form•
3.Data to be written to ROM, in EPROM form (three identical cop-
ies) or one floppy disk.
•For the mask ROM confirmation and the mark specifications, refer
to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/en/rom).
Rev.3.00 Aug 06, 2004 page 62 of 136
REJ03B0043-0300Z