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4554 Datasheet, PDF (32/138 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER | |||
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4554 Group
Table 9 Function related timers
Circuit
Structure
Prescaler
Timer 1
8-bit programmable
binary down counter
8-bit programmable
binary down counter
(link to INT0 input)
Timer 2
8-bit programmable
binary down counter
Timer 3
8-bit programmable
binary down counter
(link to INT1 input)
Timer 4
Timer 5
8-bit programmable
binary down counter
(PWM output function)
16-bit fixed dividing
frequency
Timer LC
Watchdog
timer
4-bit programmable
binary down counter
16-bit fixed dividing
frequency
Count source
⢠Instruction clock (INSTCK)
⢠Instruction clock (INSTCK)
⢠Prescaler output (ORCLK)
⢠Timer 5 underflow
(T5UDF)
⢠CNTR0 input
⢠System clock (STCK)
⢠Prescaler output (ORCLK)
⢠Timer 1 underflow
(T1UDF)
⢠PWM output (PWMOUT)
⢠PWM output (PWMOUT)
⢠Prescaler output (ORCLK)
⢠Timer 2 underflow
(T2UDF)
⢠CNTR1 input
⢠XIN input
⢠Prescaler output (ORCLK)
⢠XCIN input
⢠Bit 4 of timer 5
⢠Prescaler output (ORCLK)
⢠Instruction clock (INSTCK)
Frequency
dividing ratio
1 to 256
1 to 256
1 to 256
1 to 256
1 to 256
8192
16384
32768
65536
1 to 16
65534
Use of output signal
⢠Timer 1, 2, 3, 4 and LC count sources
⢠Timer 2 count source
⢠CNTR0 output
⢠Timer 1 interrupt
⢠Timer 3 count source
⢠CNTR0 output
⢠Timer 2 interrupt
⢠CNTR1 output control
⢠Timer 3 interrupt
⢠Timer 2, 3 count source
⢠CNTR1 output
⢠Timer 4 interrupt
⢠Timer 1, LC count source
⢠Timer 5 interrupt
⢠LCD clock
⢠System reset (count twice)
⢠WDF flag decision
Control
register
PA
W1
W2
W2
W3
W4
W5
W6
Rev.3.00 Aug 06, 2004 page 32 of 136
REJ03B0043-0300Z
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