H8S78 Datasheet, PDF (509/1208 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series

Section 9 Data Transfer Controller (DTC)
9.5.2 Repeat Mode
In repeat mode, one operation transfers one byte or one word of data. Table 9.5 lists the register
function in repeat mode. From 1 to 256 transfers can be specified. Once the specified number of
transfers has ended, the initial state of the transfer counter and the address register specified as the
repeat area is restored, and transfer is repeated. In repeat mode the transfer counter value does not
reach H'00, and therefore CPU interrupts cannot be requested when DISEL = 0.
Table 9.5 Register Function in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Designates source address
Designates destination address
Holds number of transfers
Designates transfer count
Not used
SAR
or
DAR
Repeat area
Transfer
DAR
or
SAR
Figure 9.7 Memory Mapping in Repeat Mode
Rev.7.00 Mar. 18, 2009 page 441 of 1136
REJ09B0109-0700