HD404459 Datasheet, PDF (50/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
R Ports (R0–RA): 39 input/output pins and 5 input pins addressed in 4-bit units. Data is input to these
ports by the LAR and LBR instructions, and output from them by the LRA and LRB instructions. Output
data is stored in the port data register (PDR) for each pin. The on/off statuses of the output buffers of the R
ports are controlled by R-port data control registers (DCR0–DCR9: $030–$039) that are mapped to
memory addresses (figure 30).
Data control register (DCD0 to DCD2: $02C to $02E)
(DCR0 to DCR9: $030 to $039)
DCD0, DCD1
Bit
3
2
1
0
Initial value
0
0
0
0
Read/Write
W
W
W
W
Bit name
DCD03, DCD02, DCD01, DCD00,
DCD13 DCD12 DCD11 DCD10
DCD2
Bit
3
2
1
0
Initial value
—
—
0
0
Read/Write
—
—
W
W
Bit name
Not used Not used DCD21 DCD20
DCR0 to DCR8
Bit
3
2
1
0
Initial value
0
0
0
0
Read/Write
W
W
W
W
Bit name
DCR03– DCR02– DCR01– DCR00–
DCR83 DCR82 DCR81 DCR80
DCR9
Bit
3
2
1
0
Initial value
—
0
0
0
Read/Write
—
W
W
W
Bit name
Not used DCR92 DCR91 DCR90
All Bits
0
1
CMOS Buffer On/Off Selection
Off (high-impedance)
On
Correspondence between ports and DCD/DCR bits
Register Name
Bit 3
Bit 2
DCD0
DCD1
DCD2
D₃
D₂
D₇
D₆
—
—
DCR0
DCR1
DCR2
DCR3
DCR4
DCR5
DCR6
DCR7
DCR8
DCR9
R0₃
R0₂
R1₃
R1₂
R2₃
R2₂
R3₃
R3₂
R4₃
R4₂
R5₃
R5₂
R6₃
R6₂
R7₃
R7₂
R8₃
R8₂
—
R9₂
Bit 1
D₁
D₅
D₉
R0₁
R1₁
R2₁
R3₁
R4₁
R5₁
R6₁
R7₁
R8₁
R9₁
Bit 0
D₀
D₄
D₈
R0₀
R1₀
R2₀
R3₀
R4₀
R5₀
R6₀
R7₀
R8₀
R9₀
Figure 30 Data Control Registers (DCD, DCR)
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