HD404459 Datasheet, PDF (34/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
Active mode
Watch mode
Oscillation
stabilization period
Active mode
Inte, rupt, trobe
Interrupt strobe
INT₀ , WU₀ – WU ₇
Interrupt request
generation
(During the transition
T
from watch mode to
active mode only)
T: Interrupt frame length
t_RC : Oscillation stabilization period
T
t _RC
Tx
T + t _RC < Tx < 2T + t _RC
Figure 17 Interrupt Frame
Subactive Mode: The OSC₁ and OSC₂ oscillator stops and the MCU operates with a clock generated by
the X1 and X2 oscillator. In this mode, functions other than the voltage comparator operate. However,
because the operating clock is slow, the power dissipation becomes low, next to watch mode.
The CPU instruction execution speed can be selected as 244 µs or 122 µs by setting bit 2 (SSR12) of the
system clock select register (SSR1: $029). Note that the SSR12 value must be changed in active mode. If
the value is changed in subactive mode, the MCU may malfunction.
When the STOP or SBY instruction is executed in subactive mode, the MCU enters either watch or active
mode, depending on the statuses of the low speed on flag (LSON: $020, bit 0) and the direct transfer on
flag (DTON: $020, bit 3).
Subactive mode is an optional function that the user must specify on the function option list.
Interrupt Frame: In watch and subactive modes, ø_CLK is applied to timer A and the INT₀ and WU₀–WU₇
circuits. Prescaler W and timer A operate as the time-base and generate the timing clock for the interrupt
frame. Three interrupt frame lengths (T) can be selected by setting the miscellaneous register (MIS: $00C)
(figure 18).
In watch and subactive modes, a timer A/ INT₀ wakeup interrupt is generated synchronously with the
interrupt frame. The interrupt request is generated synchronously with the interrupt strobe timing except
during transition to active mode. The falling edge of the INT₀ and WU₀–WU₇ signals is input asynchro-
nously with the interrupt frame timing, but it is regarded as input synchronously with the second interrupt
strobe clock after the falling edge. An overflow and interrupt request in timer A is generated synchronously
with the interrupt strobe timing.
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