HD404459 Datasheet, PDF (23/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
Interrupt Enable Flag (IE: $000, Bit 0): Controls the entire interrupt process. It is reset by the interrupt
processing and set by the RTNI instruction. Refer to table 4.
Table 4 Interrupt Enable Flag (IE: $000, Bit 0)
IE
Interrupt Enabled/Disabled
0
Disabled
1
Enabled
External Interrupts (INT₀ , INT₁, INT₂, INT₃, WU₀–WU₇): Five external interrupt signals.
External Interrupt Request Flags (IF0, IF1, IF2, IF3, IFWU: $000, $001, $003, $022): IF0, IF1, and
IFWU are set at the falling edge of input signals, and IF2 and IF3 are set at the rising or falling edge or both
rising and falling edges of input signals (table 5). INT₂ and INT₃ interrupt edges are selected by the
detection edge select register (ESR1: $026) (figure 11).
Table 5 External Interrupt Request Flags (IF0–IF3, IFWU: $000, $001, $003, $022)
IF0–IF3, IFWU
0
1
Interrupt Request
No
Yes
Detection edge selection register 1 (ESR1: $026)
Bit
Initial value
Read/Write
Bit name
3
0
W
ESR13
2
0
W
ESR12
1
0
W
ESR11
0
0
W
ESR10
ESR13 ESR12
0
0
1
1
0
1
INT₃ detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection*
ESR11 ESR10
0
0
1
1
0
1
INT₂ detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection*
Note: * Both falling and rising edges are detected.
Figure 11 Detection Edge Selection Register 1 (ESR1)
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