HD404459 Datasheet, PDF (25/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
Timer C Interrupt Request Flag (IFTC: $003, Bit 0): Set by overflow output from timer C (table 11).
Table 11 Timer C Interrupt Request Flag (IFTC: $003, Bit 0)
IFTC
0
1
Interrupt Request
No
Yes
Timer C Interrupt Mask (IMTC: $003, Bit 1): Prevents (masks) an interrupt request caused by the timer
C interrupt request flag (table 12).
Table 12 Timer C Interrupt Mask (IMTC: $003, Bit 1)
IMTC
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer D Interrupt Request Flag (IFTD: $001, Bit 2): Set by overflow output from timer D, or by the
rising or falling edge of signals input to EVND when the input capture function is used (table 13).
Table 13 Timer D Interrupt Request Flag (IFTD: $001, Bit 2)
IFTD
0
1
Interrupt Request
No
Yes
Timer D Interrupt Mask (IMTD: $001, Bit 3): Prevents (masks) an interrupt request caused by the timer
D interrupt request flag (table 14).
Table 14 Timer D Interrupt Mask (IMTD: $001, Bit 3)
IMTD
0
1
Interrupt Request
Enabled
Disabled (masked)
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