HD404459 Datasheet, PDF (16/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
Refer to figure 8 for the block diagram of the interrupt control circuit, table 2 for interrupt priorities and
vector addresses, and table 3 for interrupt processing conditions for the 10 interrupt sources.
An interrupt request occurs when the IF is set to 1 and the IM is set to 0. If the IE is 1 at that point, the
interrupt is processed. A priority programmable logic array (PLA) generates the vector address assigned to
that interrupt source.
For the interrupt processing sequence, see figure 9, and figure 10 for an interrupt processing flowchart.
After an interrupt is acknowledged, the previous instruction is completed in the first cycle. The IE is reset
in the second cycle, the carry, status, and program counter values are pushed onto the stack during the
second and third cycles, and the program jumps to the vector address to execute the instruction in the third
cycle.
Program the JMPL instruction at each vector address, to branch the program to the start address of the
interrupt program, and reset the IF by a software instruction within the interrupt program.
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