HD404459 Datasheet, PDF (116/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
Item
Symbol Pin(s)
Min Typ Max Unit Test Condition
Notes
External clock rise t_CPr
OSC₁
——
20 ns —
3
time
External clock fall t_CPf
OSC₁
——
20 ns —
3
time
INT₀–INT₃, EVNB, t_IH
INT₀–INT₃,
2
—
—
t_cyc/ —
4, 7
WU₀–WU₇, EVND
high widths
WU₀–WU₇,
t _subcyc
EVNB, EVND
INT₀–INT₃, EVNB, t_IL
INT₀–INT₃,
2
—
—
t_cyc/ —
4, 7
WU₀–WU₇, EVND
low widths
WU₀–WU₇,
t _subcyc
EVNB, EVND
RESET high width t_RSTH
STOPC low width t_STPL
RESET fall time t_RSTf
STOPC rise time t_STPr
Input capacitance C_in
RESET
2—
STOPC
1—
RESET
——
STOPC
——
All pins except — —
for D₁₀
D₁₀
——
——
—
t _cyc
—
5
—
t _RC
—
6
20 ms —
5
20 ms —
6
15 pF f = 1 MHz, V_in = 0 V
15 pF
180 pF
HD404458, HD404459:
f = 1MHz, V_in = 0 V
HD4074459:
f = 1 MHz, V_in = 0 V
Notes: 1. The oscillation stabilization time is the period required for the oscillator to stabilize after V_CC
reaches 1.8 V (2.2 V: HD4074459) at power-on, or after RESET input goes high or STOPC input
goes low when stop mode is cancelled. At power-on or when stop mode is cancelled, RESET or
STOPC must be input for at least t_RC to ensure the oscillation stabilization time. If using a
ceramic or crystal oscillator, contact its manufacturer to determine the required stabilization time,
since it will depend on the circuit constants and stray capacitances. Set bits 0 and 1 (MIS0,
MIS1) of the miscellaneous register (MIS: $00C) according to the oscillation stabilization time of
the system oscillation.
2. The oscillation stabilization time is the period required for the oscillator to stabilize after V_CC
reaches 1.8 V (2.2 V: HD4074459) at power-on, or after RESET input goes high or STOPC input
goes low when stop mode is cancelled. If using a crystal oscillator, contact its manufacturer to
determine the required stabilization time, since it will depend on the circuit constants and stray
capacitances.
3. Refer to figure 88.
4. Refer to figure 89. The t_cyc unit applies when the MCU is in standby or active mode. The t_subcyc
unit applies when the MCU is in watch or subactive mode.
5. Refer to figure 90.
6. Refer to figure 91.
7. In watch or subactive mode, the periods when the INT₀ and WU₀–WU₇ signals are high and when
these signals are low must be equal to the interrupt frame period or longer.
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