HD404459 Datasheet, PDF (10/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
0
$000
RAM-mapped register
64
$040
Memory register (MR)
80
$050
HD404458
Data (432 digits)
512
$200
HD404459, HD4074459
Data (688 digits)
768
$300
Not used
960
1023
Stack (64 digits)
$3C0
$3FF
Note: * Two registers are mapped
onto the same address
($00A, $00B, $00E, $00F,
$011, and $012).
R: Read only
W: Write only
R/W: Read/write
0
$000
1
2
Interrupt control bits area
$001
$002
3
$003
4 Port mode register A
(PMRA) W $004
5 Serial mode register A
(SMRA) W $005
6 Serial data register lower
(SRL) R/W $006
7 Serial data register upper
(SRU) R/W $007
8 Timer mode register A
(TMA) W $008
9 Timer mode register B1
(TMB1) W $009
10 _{Timer B}
11
(TRBL/TWBL) R/W $00A
*
(TRBU/TWBU) R/W $00B
12 Miscellaneous register
(MIS) W $00C
13 Timer mode register C1
(TMC1) W $00D
14 _{Timer C}
15
(TRCL/TWCL) R/W $00E
(TRCU/TWCU) R/W $00F
16 Timer mode register D1
(TMD1) W $010
17 _{Timer D}
18
(TRDL/TWDL) R/W $011
(TRDU/TWDU) R/W $012
19 Timer mode register B2
(TMB2) R/W $013
20 Timer mode register C2
(TMC2) R/W $014
21 Timer mode register D2
(TMD2) R/W $015
22 Comparator control register
(CCR) W $016
23 Comparator enable register
(CER) R/W $017
24 Wakeup select register
(WSR) R $018
25
$019
26
$01A
27
$01B
28
Not used
$01C
29
$01D
30
$01E
31
$01F
32
$020
33
Register flag area
$021
34
$022
35
$023
36 Port mode register B
(PMRB) W $024
37 Port mode register C
(PMRC) W $025
38 Detection edge select register 1 (ESR1) W $026
39 Detection edge select register 2 (ESR2) W $027
40 Serial mode register B
(SMRB) W $028
41 System clock select register 1 (SSR1) W $029
42 System clock select register 2 (SSR2) W $02A
43
Not used
$02B
44 Port D₀ to D₃ DCR
45 Port D₄ to D₇ DCR
46 Port D₈ to D₉ DCR
47
Not used
(DCD0) W $02C
(DCD1) W $02D
(DCD2) W $02E
$02F
48 Port R₀ DCR
49 Port R₁ DCR
50 Port R₂ DCR
51 Port R₃ DCR
52 Port R₄ DCR
53 Port R₅ DCR
54 Port R₆ DCR
55 Port R₇ DCR
56 Port R₈ DCR
57 Port R₉ DCR
58
(DCR0) W $030
(DCR1) W $031
(DCR2) W $032
(DCR3) W $033
(DCR4) W $034
(DCR5) W $035
(DCR6) W $036
(DCR7) W $037
(DCR8) W $038
(DCR9) W $039
$03A
59
$03B
60
Not used
$03C
61
$03D
62
$03E
63
$03F
10 Timer read register B lower (TRBL) R Timer write register B lower (TWBL) W $00A
11 Timer read register B upper (TRBU) R Timer write register B upper (TWBU) W $00B
14 Timer read register C lower (TRCL) R Timer write register C lower (TWCL) W $00E
15 Timer read register C upper (TRCU) R Timer write register C upper (TWCU) W $00F
17 Timer read register D lower (TRDL) R Timer write register D lower (TWDL) W $011
18 Timer read register D upper (TRDU) R Timer write register D upper (TWDU) W $012
Figure 2 RAM Memory Map
8