HD404459 Datasheet, PDF (24/122 Pages) Renesas Technology Corp – 4-bit HMCS400-series microcomputers

HD404459 Series
External Interrupt Masks (IM0, IM1, IM2, IM3, IMWU: $000, $001, $003, $022): Prevent (mask)
interrupt requests caused by the corresponding external interrupt request flags (table 6).
Table 6 External Interrupt Masks (IM0–1M3, IMWU: $000, $001, $003, $022)
IM0–IM3, IMWU
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer A Interrupt Request Flag (IFTA: $002, Bit 0): Set by overflow output from timer A (table 7).
Table 7 Timer A Interrupt Request Flag (IFTA: $002, Bit 0)
IFTA
0
1
Interrupt Request
No
Yes
Timer A Interrupt Mask (IMTA: $002, Bit 1): Prevents (masks) an interrupt request caused by the timer
A interrupt request flag (table 8).
Table 8 Timer A Interrupt Mask (IMTA: $002, Bit 1)
IMTA
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer B Interrupt Request Flag (IFTB: $002, Bit 2): Set by overflow output from timer B (table 9).
Table 9 Timer B Interrupt Request Flag (IFTB: $002, Bit 2)
IFTB
0
1
Interrupt Request
No
Yes
Timer B Interrupt Mask (IMTB: $002, Bit 3): Prevents (masks) an interrupt request caused by the timer
B interrupt request flag (table 10).
Table 10 Timer B Interrupt Mask (IMTB: $002, Bit 3)
IMTB
0
1
Interrupt Request
Enabled
Disabled (masked)
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