SH72544R Datasheet, PDF(48/56 Page) Renesas Technology Corp – Microcomputer Development Environment System

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SH72544R Datasheet, PDF (48/56 Pages) Renesas Technology Corp – Microcomputer Development Environment System

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Section 2 Software Specifications when Using the SH72546RFCC, SH72544R, SH72543R, SH72531FCC,

and SH72531

Table 2.16 Measurement Item

Selected Name

Option

Disabled

None

Elapsed time

AC (The number of execution cycles (IÏ).)

Branch instruction counts

Number of execution instructions

Number of execution 32bit-instructions

I32

Exception/interrupt counts

Interrupt counts

INT

Data cache-miss counts

Instruction cache-miss counts

All area access counts

ARN

All area instruction access counts

ARIN

All area data access counts

ARND

Cacheable area access counts

CDN (data access)

Cacheable area instruction access counts

CIN

Non cacheable area data access counts

NCN

URAM area access counts

URAM area instruction access counts

UIN

URAM area data access counts

UDN

Internal I/O area data access counts

IODN

Internal ROM area access counts

Internal ROM area instruction access counts

RIN

Internal ROM area data access counts

RDN

All area access cycle

ARC

All area instruction access cycle

ARIC

All area data access cycle

ARDC

All area access stall

ARS

All area instruction access stall

ARIS

All area data access stall

ARDS

Note: Selected names are displayed for CONDITION in the [Performance Analysis] window.

Options are parameters for <mode> of the PERFORMANCE_SET command.

Rev. 2.00 Jun. 08, 2009 Page 42 of 46

REJ10J1941-0200

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