SH72544R Datasheet, PDF (23/56 Pages) Renesas Technology Corp – Microcomputer Development Environment System

Section 2 Software Specifications when Using the SH72546RFCC, SH72544R, SH72543R, SH72531FCC,
and SH72531
Table 2.3 Stopping Time by Memory Access (Reference)
Method
H-UDI read/write
Short break
Condition
Reading of one longword for the
internal RAM
Writing of one longword for the
internal RAM
CPU clock: 160 MHz
JTAG clock: 20 MHz
Reading or writing of one longword
for the external area
Stopping Time
Reading: Maximum three bus clocks
(Bφ)
Writing: Maximum two bus clocks
(Bφ)
About 50 ms
7. Memory Access to the External Flash Memory Area
The emulator can download the load module to the external flash memory area (for details,
refer to section 6.22, Download Function to the Flash Memory Area, in the SuperH^TM Family
E10A-USB Emulator User’s Manual). Other memory write operations are enabled for the
RAM area. Therefore, an operation such as memory write or BREAKPOINT should be set
only for the RAM area.
8. ROM Cache
For ROM cache in the MCU, the emulator operates as shown in table 2.4.
Table 2.4 Operation for ROM Cache
Function
Write and erase of the flash memory
Download of the program to the flash memory
Set an overlap of ERAM to the flash memory*
Change of the setting of an overlap of ERAM to the flash
memory*
Download of a program to ERAM overlapped with the flash
memory*
Rewrite of the memory contents of ERAM overlapped with
the flash memory*
Set a software break to the flash memory and ERAM
overlapped with the flash memory*
Memory read
Operation
Writes or erases all contents of
ROM cache.
Accesses the disabled cache
area to read the content of
internal flash memory.
Rev. 2.00 Jun. 08, 2009 Page 17 of 46
REJ10J1941-0200