SH72544R Datasheet, PDF (24/56 Pages) Renesas Technology Corp – Microcomputer Development Environment System

Section 2 Software Specifications when Using the SH72546RFCC, SH72544R, SH72543R, SH72531FCC,
and SH72531
Note: If the target device is the SH72544R, SH72543R, or SH72531, the function for setting the
emulation RAM is not supported.
9. Using WDT
The WDT does not operate during break.
10. Loading Sessions
Information in [JTAG clock] of the [Configuration] dialog box cannot be recovered by loading
sessions. Thus the TCK value will be as follows:
⎯ When HS0005KCU01H or HS0005KCU02H is used: TCK = 10 MHz
11. [IO] Window
⎯ Display and modification
For each watchdog timer register, there are two registers to be separately used for write and
read operations.
Table 2.5 Watchdog Timer Register
Register Name
WTCR(W)
WTCNT(W)
WTCR(R)
WTCNT(R)
WTSR(W)
WTSR(R)
WRCR(W)
WRCR(R)
Usage
Write
Write
Read
Read
Write
Read
Write
Read
Register
Watchdog timer control register
Watchdog timer counter
Watchdog timer control register
Watchdog timer counter
Watchdog timer status register
Watchdog timer status register
Watchdog reset control register
Watchdog reset control register
⎯ Customization of the I/O-register definition file
The internal I/O registers can be accessed from the [IO] window. After the I/O-register
definition file is created, the MCU’s specifications may be changed. If each I/O register in
the I/O-register definition file differs from addresses described in the hardware manual,
change the I/O-register definition file according to the description in the hardware manual.
The I/O-register definition file can be customized depending on its format. However, the
emulator does not support the bit-field function.
⎯ Verify
In the [IO] window, the verify function of the input value is disabled.
Rev. 2.00 Jun. 08, 2009 Page 18 of 46
REJ10J1941-0200