RX64M_16 Datasheet, PDF (111/228 Pages) Renesas Technology Corp – 120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory

RX64M Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (40 / 67)
Address
0009 0420h
Module
Symbol Register Name
CAN0 FIFO Received ID Compare Register 0
0009 0424h CAN0 FIFO Received ID Compare Register 1
0009 0428h CAN0 Mask Invalid Register
0009 042Ch CAN0 Mailbox Interrupt Enable Register
0009 0820h to CAN0
0009 083Fh
0009 0840h CAN0
0009 0842h CAN0
0009 0844h CAN0
Message Control Registers 0 to 31
Control Register
Status Register
Bit Configuration Register
0009 0848h CAN0
0009 0849h CAN0
0009 084Ah CAN0
0009 084Bh CAN0
0009 084Ch CAN0
0009 084Dh CAN0
0009 084Eh CAN0
0009 084Fh CAN0
0009 0850h CAN0
0009 0851h CAN0
0009 0852h CAN0
0009 0853h CAN0
0009 0854h CAN0
0009 0856h CAN0
0009 0858h CAN0
0009 1200h to CAN1
0009 13FFh
0009 1400h to CAN1
0009 141Fh
0009 1420h CAN1
Receive FIFO Control Register
Receive FIFO Pointer Control Register
Transmit FIFO Control Register
Transmit FIFO Pointer Control Register
Error Interrupt Enable Register
Error Interrupt Factor Judge Register
Receive Error Count Register
Transmit Error Count Register
Error Code Store Register
Channel Search Support Register
Mailbox Search Status Register
Mailbox Search Mode Register
Time Stamp Register
Acceptance Filter Support Register
Test Control Register
Mailbox Registers 0 to 31
Mask Registers 0 to 7
FIFO Received ID Compare Register 0
0009 1424h CAN1 FIFO Received ID Compare Register 1
0009 1428h CAN1 Mask Invalid Register
0009 142Ch CAN1 Mailbox Interrupt Enable Register
0009 1820h to CAN1
0009 183Fh
0009 1840h CAN1
0009 1842h CAN1
0009 1844h CAN1
Message Control Registers 0 to 31
Control Register
Status Register
Bit Configuration Register
0009 1848h
0009 1849h
0009 184Ah
0009 184Bh
0009 184Ch
0009 184Dh
0009 184Eh
0009 184Fh
0009 1850h
0009 1851h
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
Receive FIFO Control Register
Receive FIFO Pointer Control Register
Transmit FIFO Control Register
Transmit FIFO Pointer Control Register
Error Interrupt Enable Register
Error Interrupt Factor Judge Register
Receive Error Count Register
Transmit Error Count Register
Error Code Store Register
Channel Search Support Register
Register
Symbol
Number of Access Cycles
Number Access
of Bits Size ICLK PCLK
ICLK  PCLK
FIDCR0
32
8, 16,
32
2, 3 PCLKB
2 ICLK
FIDCR1
32
8, 16,
32
2, 3 PCLKB
2 ICLK
MKIVLR
32
8, 16,
32
2, 3 PCLKB
2 ICLK
MIER
32
8, 16,
32
2, 3 PCLKB
2 ICLK
MCTL0 to 31
8
8
2, 3 PCLKB
2 ICLK
CTLR
STR
BCR
RFCR
RFPCR
TFCR
TFPCR
EIER
EIFR
RECR
TECR
ECSR
CSSR
MSSR
MSMR
TSR
AFSR
TCR
MB0 to 31
16
8, 16
16
8, 16
32
8, 16,
32
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
8, 16
8
8
128
8, 16,
32*⁶
MKR0 to 7
32
8, 16,
32
FIDCR0
32
8, 16,
32
FIDCR1
32
8, 16,
32
MKIVLR
32
8, 16,
32
MIER
32
8, 16,
32
MCTL0 to 31
8
8
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
CTLR
STR
BCR
RFCR
RFPCR
TFCR
TFPCR
EIER
EIFR
RECR
TECR
ECSR
CSSR
16
8, 16
16
8, 16
32
8, 16,
32
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2, 3 PCLKB
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
Related
Function
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
CAN
R01DS0173EJ0110 Rev.1.10
Oct 24, 2016
Page 111 of 228