HYB18H512321BF Datasheet, PDF (35/43 Pages) Qimonda AG – 512-Mbit GDDR3 Graphics RAM

Internet Data Sheet
HYB18H512321BF
512-Mbit GDDR3
Parameter CAS latency Symbol
Limit Values
Unit Note
-8
–10
–11
–12
–14
Min Max Min. Max. Min. Max. Min. Max. Min. Max.
Column Timing
CAS(a) to CAS(b) Command t_CCD
2
—2
—2
—2
—2
—
t_CK ⁷⁾
period
Write to Read Command
t_WTR
8
—7
—6
—6
—5
—
t_CK ⁸⁾
Delay
Read to Write command
t_RTW
delay
t_RTW(min)= (CL + BL/2 +2 -WL)
t_CK ⁹⁾
Write Cycle Timing Parameters for Data and Data Strobe
Write command to first
WDQS latching transition
t_DQSS
WL– WL+ WL– WL+ WL– WL+ WL– WL+ WL– WL+ t_CK
0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25
Data-in and Data Mask to t_DS
WDQS Setup Time
0.13 — 0.14 — 0.15 — 0.16 — 0.18 — ns
Data-in and Data Mask to t_DH
WDQS Hold Time
0.13 — 0.14 — 0.15 — 0.16 — 0.18 — ns
Data-in and DM input pulse t_DIPW 0.4 — 0.40 — 0.40 — 0.40 — 0.40 — t_CK
width (each input)
DQS input low pulse width t_DQSL 0.45 — 0.40 — 0.40 — 0.40 — 0.40 — t_CK
DQS input high pulse width t_DQSH 0.45 — 0.40 — 0.40 — 0.40 — 0.40 — t_CK
DQS Write Preamble Time t_WPRE 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 t_CK
DQS Write Postamble Time t_WPST 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 t_CK
Write Recovery Time
t_WR
13 — 13 — 13 — 12 — 10 — t_CK
Read Cycle Timing Parameters for Data and Data Strobe
Data Access Time from
t_AC
-0.20 -0.20 -0.21 0.21 -0.22 0.22 -0.22 0.22 –0.25 0.25 ns
Clock
Read Preamble
Read Postamble
Data-out high impedance
time from CLK
t_RPRE
t_RPST
t_HZ
0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 t_CK
0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 0.75 1.25 t_CK
t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax ns
Data-out low impedance time t_LZ
from CLK
t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax t_ACmin t_ACmax ns
DQS edge to Clock edge
skew
DQS edge to output data
edge skew
t_DQSCK -0.20 0.20 -0.21 0.21 -0.22 0.22 -0.22 0.22 –0.25 0.25 ns
t_DQSQ — 0.110 — 0.120 — 0.130 — 0.140 — 0.160 ns ¹⁰⁾
Data hold skew factor
t_QHS
Data output hold time from t_QH
DQS
— 0.110 — 0.120 — 0.130 — 0.140 — 0.160 ns
t_HP–t_QHS
ns
Refresh/Power Down Timing
Refresh Period (8192 cycles) t_REF
Average periodic Auto
t_REFI
Refresh interval
— 32 — 32 — 32 — 32 — 32 ms
3.9
3.9
3.9
3.9
3.9
μs
Rev. 1.1, 2007-09
35
05292007-WAU2-UU95