English
Language : 

SAA7348GP Datasheet, PDF (6/60 Pages) NXP Semiconductors – All Compact Disc Engine ACE
◁
Philips Semiconductors
All Compact Disc Engine (ACE)
Preliminary specification
SAA7348GP
6 PINNING
SYMBOL
PIN
TS1
1
TS2
2
TS3
3
RST
4
TPWM
5
TEN
6
MIDLAD
7
REFLCA
8
HFIN
9
REFHCA
10
Iref
11
VSSA1
12
VDDA1
13
VRH
14
D1
15
D2
16
D3
17
VSSA2
18
VDDA2
19
D4
20
S1
21
S2
22
IrefT
23
FTCH
24
FTCL
25
SELPLL
26
XTALO
27
XTALI
28
VSSD1
29
RXD0
30
TXD0
31
INT0
32
INT1
33
RXD1
34
TXD1
35
WR
36
RD
37
VSSD2
38
VDDD1(core)
39
A8
40
1997 Jul 11
TYPE(1)
I
I
I
I
O
O
A
A
A
A
A
S
S
A
A
A
A
S
S
A
A
A
A
A
A
I
A
A
S
B
B
B
B
B
B
B
B
S
S
B
DESCRIPTION
test control input; this pin should be tied LOW
test control input; this pin should be tied LOW
test control input; this pin should be tied LOW
power-on reset input
tray PWM output
tray enable output
ladder middle decoupling of High Frequency (HF) ADC
ladder low decoupling of HF ADC
HF input
ladder high decoupling of HF ADC
reference current input
analog ground 1 for HF front-end
analog supply voltage 1 for HF front-end (3.3 V)
calibrated reference voltage output from ADC
unipolar current input (central diode signal input)
unipolar current input (central diode signal input)
unipolar current input (central diode signal input)
analog ground 2 for LF front-end
analog supply voltage 2 for LF front-end (3.3 V)
unipolar current input (central diode signal input)
unipolar current input (satellite diode signal input)
unipolar current input (satellite diode signal input)
current reference, for input range of LF front-end ADCs
fast track counter comparator (+) input
fast track counter comparator (−) input
enables internal clock multiplier PLL
crystal output
crystal input
digital ground 1
P3.0
P3.1
P3.2 (interrupt 0)
P3.3 (interrupt 1)
P3.4
P3.5
P3.6; active LOW
P3.7; active LOW
digital ground 2
digital supply voltage 1 for the core (3.3 V)
P2.0 (address or I/O)
6
 ▷