SAA7348GP Datasheet, PDF (31/60 Pages) NXP Semiconductors – All Compact Disc Engine ACE

Philips Semiconductors
All Compact Disc Engine (ACE)
Preliminary specification
SAA7348GP
8.1.9 MOTOR GAIN QCLV REGISTER (address 0XFAH)
The motor_gain_QCLV register is used to set the gain of
the motor control signal. It can be used in quasi as well as
in CLV mode. Only the 6 least significant bits are used (see
Table 23 for values). The actual gain depends on the filter
in the config register (Cnf_filter). If the filtering is switched
on, the gain is reduced by a factor of 8. The register is byte
addressable; R/W.
Table 23 Loop gain
SFR SETTING
00000000
00111111
00111110
00111101
00111100
00111011
00111010
00111001
00111000
00110111
00110110
00110101
00110100
00110011
00110010
00110001
00110000
00101111
00101110
00101101
00101100
00101011
00101010
00101001
00101000
00100111
00100110
00100101
00100100
00100011
00100010
00100001
GAIN
FILTER ON
FILTER OFF
1
0.125
2
0.25
3
0.375
4
0.5
5
0.625
6
0.75
7
0.875
8
1
9
1.125
10
1.25
11
1.375
12
1.5
13
1.625
14
1.75
15
1.875
16
2
17
2.125
18
2.25
19
2.375
20
2.5
21
2.625
22
2.75
23
2.875
24
3
25
3.125
26
3.25
27
3.375
28
3.5
29
3.625
30
3.75
31
3.875
32
4
SFR SETTING
00100000
00011111
00011110
00011101
00011100
00011011
00011010
00011001
00011000
00010111
00010110
00010101
00010100
00010011
00010010
00010001
00010000
00001111
00001110
00001101
00001100
00001011
00001010
00001001
00001000
00000111
00000110
00000101
00000100
00000011
00000010
GAIN
FILTER ON
FILTER OFF
33
4.125
34
4.25
35
4.375
36
4.5
37
4.625
38
4.75
39
4.875
40
5
41
5.125
42
5.25
43
5.375
44
5.5
45
5.625
46
5.75
47
5.875
48
6
49
6.125
50
6.25
51
6.375
52
6.5
53
6.625
54
6.75
55
6.875
56
7
57
7.125
58
7.25
59
7.375
60
7.5
61
7.625
62
7.75
63
7.875
1997 Jul 11
31