SAA7348GP Datasheet, PDF (41/60 Pages) NXP Semiconductors – All Compact Disc Engine ACE

Philips Semiconductors
All Compact Disc Engine (ACE)
Preliminary specification
SAA7348GP
REGISTER
7
(DAC output
control)
ADDRESS
0111
8
(PLL loop filter
bandwidth)
9
(PLL
equalization)
1001
A
(EBU output)
1010
DATA
xxx0
xxx1
xx0x
xx1x
11xx
10xx
01xx
00xx
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000
xx0x
xx1x
x1x1
x0x1
x0x0
x1x0
0xxx
1xxx
FUNCTION
DAC data normal value
DAC data inverted value
left channel first at DAC (WCLK normal)
right channel first at DAC (WCLK inverted)
stereo output at DAC
left mono out at DAC
right mono out at DAC
both DAC channels killed
see Table 32
equalization = −60 ns
equalization = −45 ns
equalization = −30 ns
equalization = −15 ns
equalization = 0 ns
equalization = 15 ns
equalization = 30 ns
equalization = 45 ns
equalization = 60 ns
equalization = 75 ns
equalization = 90 ns
equalization = 105 ns
equalization = 120 ns
equalization = 135 ns
equalization = 150 ns
equalization = 165 ns
DOBM data before concealment
DOBM data after concealment and fade
DOBM off; output LOW
class 1 crystal (<50 ppm)
class 2 crystal (<1000 ppm)
class 3 crystal (>1000 ppm)
flags to DOBM off
flags to DOBM on
INITIAL⁽¹⁾
reset
−
reset
−
reset
−
−
−
−
−
−
−
reset
−
−
−
−
−
−
−
−
−
−
−
−
reset
−
−
reset
-
reset
−
1997 Jul 11
41