SAA7348GP Datasheet, PDF (11/60 Pages) NXP Semiconductors – All Compact Disc Engine ACE

Philips Semiconductors
All Compact Disc Engine (ACE)
Preliminary specification
SAA7348GP
Table 1 Typical input currents for a range of values of R_IrefT
R_IrefT
(kΩ)
200
220
240
270
300
330
360
390
430
470
510
560
620
680
750
TYPICAL CURRENT INPUT RANGE
f_sys⁽¹⁾ = 4.2336 MHz
f_sys⁽¹⁾ = 8.4672 MHz
D1, D2, D3, D4
(µA)
S1, S2
(µA)
V_RH
D1, D2, D3, D4
S1, S2
(V)
(µA)
(µA)
12.000
10.909
10.000
8.889
8.000
7.273
6.667
6.154
5.581
5.106
4.706
4.286
3.871
3.529
3.200
6.000
5.455
5.000
4.444
4.000
3.636
3.333
3.077
2.791
2.553
2.353
2.143
1.935
1.765
1.600
1.891
1.719
1.576
1.396
1.261
1.146
1.051
0.970
0.880
0.805
0.742
0.675
0.610
0.556
0.504
12.000
10.909
10.000
8.889
8.000
7.273
6.667
6.350
−
−
−
−
−
−
−
6.000
5.455
5.000
4.444
4.000
3.636
3.333
3.175
−
−
−
−
−
−
−
Note
1. f_sys is always equal to ^{s----e---r--v---o---2----c---l-o---c---k--} ; see Table 9.
V_RH
(V)
0.946
0.860
0.788
0.698
0.631
0.573
0.526
0.500
−
−
−
−
−
−
−
The preset latch command can be used to select this
method of V_RH automatic adjustment.
Alternatively, the dynamic range of the input currents can
be made dependent on the ADC reference voltage, V_RH.
In this case, the maximum input current for the central and
satellite diodes, respectively, is:
I_{i(central) (max)} = f_sys × V_RH × 1.10 × 10^–6 ( µA)
I_{i(satellite) (max)} = f_sys × V_RH × 0.55 × 10^–6 ( µA)
where f_sys = 4.2336 MHz.
V_RH can be set to any one of 32 pre-defined levels,
selectable under software control. V_RH is initially set to
2.5 V using the preset latch command, then incremented
or decremented one level at a time by repeatedly
resending the same commend.
7.2 Decoder functions
The SAA7348 is a multi-speed decoding device with an
internal phase locked loop clock multiplier. Several
playback speeds can be selected, depending on the
crystal frequency and the internal clock settings;
see Table 2.
The following functions are performed in the decoder
block:
• Demodulation (includes sync protection circuit);
converts the 14-bit EFM data and subcode words into
8-bit symbols.
• Subcode data processing.
• Error correction; a t = 2, e = 4 type is used on both C1
(32 symbol) and C2 (28 symbol) frames. The error
corrector can correct up to 2 errors on the C1 level and
up to 4 errors on the C2 level. The error corrector also
contains a flag processor. Flags are assigned to
symbols when the error corrector cannot ascertain if the
symbols are definitely good. C1 generates output flags
that are used by C2. The C2 output flags are used by the
interpolator to conceal uncorrectable errors for audio
output; they are also output via the EBU signal (DOBM)
and the VALID output with I²S for CD-ROM applications.
1997 Jul 11
11