SAA7348GP Datasheet, PDF (43/60 Pages) NXP Semiconductors – All Compact Disc Engine ACE

Philips Semiconductors
All Compact Disc Engine (ACE)
Preliminary specification
SAA7348GP
REGISTER ADDRESS
DATA
FUNCTION
INITIAL⁽¹⁾
F
(Subcode
interface)
1111
x0xx
x1xx
0xxx
1xxx
xx10
xx10
subcode interface off
subcode interface on
4-wire subcode
3-wire subcode
decrease AGC gain 1 step, when AGC off (register C)
increase AGC gain 1 step, when AGC off (register C)
reset
−
reset
−
−
−
Notes
1. The initial column shows the power-on reset state.
2. Speed can be set to (1.5×, 3×, 6× and 12×) or (2×, 4×, 8× and 16×) via the microcontroller application register
CLKgen.
Table 32 Loop filter bandwidth
REGISTER
8
(PLL loop filter
bandwidth)
ADDRESS DATA
1000
0000
0001
0010
0100
0101
0110
1000
1001
1010
1100
1101
1110
LOOP
BANDWIDTH
(Hz)
1640 × n
3279 × n
6560 × n
1640 × n
3279 × n
6560 × n
1640 × n
3279 × n
6560 × n
1640 × n
3279 × n
6560 × n
Note
1. The initial column shows the power-on reset state.
FUNCTION
INTERNAL
BANDWIDTH
(Hz)
525 × n
263 × n
131 × n
1050 × n
525 × n
263 × n
2101 × n
1050 × n
525 × n
4200 × n
2101 × n
1050 × n
LOW-PASS
BANDWIDTH
(Hz)
8400 × n
16800 × n
33600 × n
8400 × n
16800 × n
33600 × n
8400 × n
16800 × n
33600 × n
8400 × n
16800 × n
33600 × n
INITIAL⁽¹⁾
−
−
−
−
−
−
−
reset
−
−
−
−
1997 Jul 11
43