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MN101E30N Datasheet, PDF (24/48 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller
MN101E30N/E30R/EF30R
8-bit Single-chip Microcontroller
PubNo. 2163001-019E
Name
ACZ1
ACZ0
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
NWE
NRE
NCS
NDK
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
NO I/O
31 input
Other Function
P21,SEG53,IRQ1
30
P20,SEG54,IRQ0
64 input P50,SEG20,D0,SBO0A,
TXD0A
63
P51,SEG21,D1,SBI0A,
RXD0A
62
P52,SEG22,D2,SBT0A
61
P53,SEG23,D3,BUZZERA
60
P54,SEG24,D4,NBUZZERA
59
P55,SEG25,D5
58
P56,SEG26,D6
57
P57,SEG27,D7
22 I/O
RXD1A,SBI1A,TM7IOB,P00
23
TXD1A,SBO1A,TM8IOB,P01
24
SBT1A,TM9IOB,P02
25
RMOUTB,TM0IOB,TM2IOB,
P03
26
P04,SBO3A,TXD3A
27
P05,SBI3A,RXD3A
28
P06,SBT3A
29
P07,DA_A
75 output P72,SEG9,SBT2A
76
SDA5A,SEG8,P73
77
SCL5A,SEG7,P74
90 input VLC2,P93
67 output P62,SEG17,TM1IOB
68
P63,SEG16,TM3IOB
69
P64,SEG15,TM4IOB
70
P65,SEG14,SBI4A
71
P66,SEG13,SBO4A,SDA4A
72
P67,SEG12,SBT4A,SCL4A
73
P70,SEG11,SBO2A,TXD2A
74
P71,SEG10,SBI2A,RXD2A
78
TXD1B,SBO1B,SEG6,P75
79
RXD1B,SBI1B,SEG5,P76
80
SBT1B,SEG4,P77
81
TM9OD0,SDO0,SEG3,P80
82
TM9OD1,SDO1,SEG2,P81
83
TM9OD2,SDO2,SEG1,P82
84
TM9OD3,SDO3,SEG0,P83
85
TM9OD4,SDO4,COM0,P84
86
TM9OD5,SDO5,COM1,P85
87
SDO6,COM2,P86
88
SDO7,COM3,P87
89
VLC3,P92
Function
AC zero-cross
detection
input pins
Key interrupt
input pins
Description
AC zero-cross detection input pin.
AC zero-cross detection output “H” when input level is
mid-level and “L” otherwise.
ACZ input signal is connected to P20 input and IRQ0
interrupt circuit or P21 input and IRQ1 interrupt circuit.
When not used for AC zero-cross detection, these can
be used as normal input pins.
Input pins for interrupt based on OR result of pin
inputs.
These can be set to key input pins by 1-bit with the
key interrupt control register (KEYT3_1IMD,
KEYT3_2IMD) and by 2-bit with the key interrupt con-
trol register (KEYT3_1IMD).
When not used for KEY input, these pins can be used
as normal I/O pins.
LED drive pins
Large current output pins.
When not used for LED output, these pins can be
used as normal I/O pins.
Write enable pins
[Active low]
Read enable pins
[Active low
Chip select pins
[Active low]
Data acknowl-
edge pins [Active
low]
Memory control signal used when the memory area is
expanded to the external of this LSI.
NWE is the strobe signal output for the write operation
of the external memory and NRE is the strobe signal
output for the read operation of the external memory
NCS is the chip selection signal outputs the external
memory at the access.
NDK is the acknowledge signal that indicates close of
access to the external memory.
Address pin
A0-A19 is the address signal to the external memory.
D0-D7 is the data I/O signal to the external memory.
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Publication date: October 2015