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AR0130 Datasheet, PDF (6/53 Pages) ON Semiconductor – CMOS Digital Image Sensor
AR0130: 1/3-Inch CMOS Digital Image Sensor
General Description
General Description
The ON Semiconductor AR0130 can be operated in its default mode or programmed for
frame size, exposure, gain, and other parameters. The default mode output is a 960p-
resolution image at 45 frames per second (fps). It outputs 12-bit raw data over the
parallel port. The device may be operated in video (master) mode or in single frame
trigger mode.
FRAME_VALID and LINE_VALID signals are output on dedicated pins, along with a
synchronized pixel clock in parallel mode.
The AR0130 includes additional features to allow application-specific tuning:
windowing and offset, adjustable auto-exposure control, and auto black level correction.
Optional register information and histogram statistic information can be embedded in
first and last 2 lines of the image frame.
Functional Overview
The AR0130 is a progressive-scan sensor that generates a stream of pixel data at a
constant frame rate. It uses an on-chip, phase-locked loop (PLL) that can be optionally
enabled to generate all internal clocks from a single master input clock running between
6 and 50 MHz The maximum output pixel rate is 74.25 Mp/s, corresponding to a clock
rate of 74.25 MHz. Figure 1 shows a block diagram of the sensor.
Figure 1: Block Diagram
Power
Active Pixel Sensor
(APS)
Array
OTPM
Memory
PLL
External
Clock
Timing and Control
(Sequencer)
Auto Exposure
and Stats Engine
Trigger
Analog Processing and
A/D Conversion
Pixel Data Path
(Signal Processing)
Parallel
Output
Two-Wire
Serial
Interface
Control Registers
User interaction with the sensor is through the two-wire serial bus, which communi-
cates with the array control, analog signal chain, and digital signal chain. The core of the
sensor is a 1.2 Mp Active- Pixel Sensor array. The timing and control circuitry sequences
through the rows of the array, resetting and then reading each row in turn. In the time
interval between resetting a row and reading that row, the pixels in the row integrate
incident light. The exposure is controlled by varying the time interval between reset and
readout. Once a row has been read, the data from the columns is sequenced through an
analog signal chain (providing offset correction and gain), and then through an analog-
to-digital converter (ADC). The output from the ADC is a 12-bit value for each pixel in
the array. The ADC output passes through a digital processing signal chain (which
AR0130 DS Rev. L Pub. 6/15 EN
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©Semiconductor Components Industries, LLC, 2015.