SE98 Datasheet, PDF (29/39 Pages) NXP Semiconductors – DDR memory module temp sensor, 3.3 V

NXP Semiconductors
SE98
DDR memory module temp sensor, 3.3 V
Table 27. SMBus AC characteristics
V_DD = 3.0 V to 3.6 V; T_amb = −40 °C to +120 °C; unless otherwise specified. These specifications are guaranteed by design.
The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I²C-bus from DC
to 400 kHz.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
f_SCL
t_LOW
t_HIGH
t_BUF
SCL clock frequency
LOW period of the SCL clock
HIGH period of the SCL clock
bus free time between a STOP and
START condition
10 % to 10 %
90 % to 90 %
0
-
1.3
-
0.6
-
4.7
-
400
kHz
-
µs
-
µs
-
µs
t_HD;STA
hold time (repeated) START condition 10 % of SDA to
[1] _4.7
-
-
µs
90 % of SCL
t_HD;DAT
t_SU;DAT
t_SU;STA
data hold time
data set-up time
set-up time for a repeated START
condition
[2] ₃₀₀
-
-
ns
250
-
-
ns
[3] ₂₅₀
-
-
ns
t_SU;STO
t_r
t_f
t_f(o)
t_to(SMBus)
set-up time for STOP condition
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
output fall time
SMBus time-out time
0.6
-
-
-
-
-
-
-
[4] ₂₅
-
-
µs
300
ns
300
ns
250
ns
35
ms
[1] Delay from SDA START to first SCL HIGH-to-LOW transition.
[2] Delay from SCL HIGH-to-LOW transition to SDA edges.
[3] Delay from SCL LOW-to-HIGH transition to restart SDA.
[4] LOW period to reset SMBus.
SCL
SDA
t_BUF
P
S
t_LOW
t_r
t_HD;STA
t_HD;DAT
Fig 19. AC timing diagram
t_f
t_HIGH
t_SU;DAT
t_SU;STA
t_HD;STA
t_SU;STO
S
P
002aab235
SE98_4
Product data sheet
Rev. 04 — 2 February 2009
© NXP B.V. 2009. All rights reserved.
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