HPC46100 Datasheet, PDF (6/32 Pages) National Semiconductor (TI) – HPC46100 High-Performance microController with DSP Capability

A D Converter Specifications
V_CC e 5V g10% (V_SS b 0 050V) ^s Any Input ^s (V_CC a 0 050V) f_IN e 24 MHz
Parameter
Conditions
Min
Typ
Max
Units
Resolution
8
Bits
Reference Voltage Input
Absolute Accuracy
Non-Linearity
AGND e 0V
3
V_REF e V_CC
V_REF e V_CC
Deviation from the
Best Straight Line
V_CC
V
g1
LSB
g
LSB
Differential Non-Linearity
Input Reference Resistance
V_REF e V_CC
16
g
LSB
48
kX
Common Mode Input Range (Note 6)
DC Common Mode Error
AGND
V_REF
g
V
LSB
Off Channel Leakage Current
1
mA
On Channel Leakage Current
1
mA
A D Clock Frequency (Note 7)
01
20
MHz
Conversion Time (Note 8)
A D Clock
13 0
Cycle
Note 6 For V_IN(b) t V_IN(a) the digital output code will be 0000 0000 Two on-chip diodes are tied to each analog input The diodes will forward conduct for
analog input voltages below ground or above the V_CC supply Be careful during testing at low V_CC levels (4 5V) as high level analog inputs (5V) can cause this
input diode to conduct especially at elevated temperatures and cause errors for analog inputs near full-scale The spec allows 50 mV forward bias of either diode
This means that as long as the analog V_IN does not exceed the supply voltage by more than 50 mV the output code will be correct To achieve an absolute 0 V_DC
to 5 V_DC input voltage range will therefore require a minimum supply voltage of 4 950 V_DC over temperature variations initial tolerance and loading
Note 7 See Prescaler description
Note 8 Conversion Time includes sample and hold time See following diagrams
TL DD 11289 – 33
Note The trigger condition generated by the start conversion method selected by the SC bits requires one CK2 to propagate through before the trigger condition is
known Once the trigger condition is known the sample and hold will start at the next rising edge of ADCLK The diagram shows worst case
6