HPC46100 Datasheet, PDF (28/32 Pages) National Semiconductor (TI) – HPC46100 High-Performance microController with DSP Capability

Design Considerations (Continued)
TL DD 11289–35
FIGURE 31 Recommended Overtone Crystal Circuit
A recommended layout for the oscillator network should be
as close to the processor as physically possible entirely
within ‘‘1’’ distance This is to reduce lead inductance from
long PC traces as well as interference from other compo-
nents and reduce trace capacitance The layout contains a
large ground plane either on the top or bottom surface of
the board to provide signal shielding and a convenient loca-
tion to ground both the HPC and the case of the crystal It is
very critical to have an extremely clean power supply for the
HPC crystal oscillator Ideally one would like a V_CC and
ground plane that provide low inductance power lines to the
chip The power planes in the PC board should be decou-
pled with three decoupling capacitors as close to the chip
as possible A 1 0 mF a 0 1 mF and a 0 001 mF capacitor
dipped mica or ceramic cap mounted as close to the HPC
as physically possible on the board using short leads or
surface mount components This should provide a stable
power supply and noiseless ground plane which will vastly
improve the performance of the crystal oscillator network
HPC46100 CPU
The HPC46100 CPU has a 16-bit ALU and six 16-bit regis-
ters
ARITHMETIC LOGIC UNIT (ALU)
The ALU is 16 bits wide and can do 16-bit add subtract and
shift or logic AND OR and exclusive OR in one timing cycle
The ALU has two carry bits one for signed overflow (V bit)
and one for unsigned overflow (C bit)
ACCUMULATOR (A) REGISTER
The 16-bit A register is the source and destination register
for most I O arithmetic logic and data memory access op-
erations
ADDRESS (B AND X) REGISTERS
The 16-bit B and X registers can be used for indirect ad-
dressing They can automatically count up or down to se-
quence through data memory
BOUNDARY (K) REGISTER
The 16-bit K register is used to set limits in repetitive loops
of code as register B sequences through data memory The
K register can also be used as a pointer register
STACK POINTER (SP) REGISTER
The 16-bit SP register is the pointer that addresses the
stack The SP register is incremented by two for each push
or call and decremented by two for each pop or return The
stack can be placed anywhere in user memory and be as
deep as the available memory permits The SP register can
also be used as a pointer register
PROGRAM (PC) REGISTER
The 16-bit PC register addresses program memory
MAU RESULT REGISTER (MRR)
The 32-bit MAU Result Register holds the results from MAC
(Multiply Accumulate) instructions In addition it receives
the result of the MULS (Multiply Signed) instruction and can
be shifted in place by the ASHR (Arithmetic Shift Right) op-
eration
Addressing Modes
ADDRESSING MODES WITH THE ACCUMULATOR
AS DESTINATION
Register Indirect
The operand is the memory addressed by the A B X or K
register This mode of addressing for the HPC46100 pro-
duces single byte instructions when using the B or X register
(depending on the instruction)
Direct
The instruction contains an 8-bit or 16-bit address field that
directly points to the memory for the operand
Indirect
The instruction contains an 8-bit address field The contents
of the WORD addressed points to the memory for the oper-
and
Indexed
The instruction contains an 8-bit address field and an 8- or
16-bit displacement field The contents of the WORD ad-
dressed is added to the displacement to get the address of
the operand
Immediate
The instruction contains an 8-bit or 16-bit immediate field
that is used as the operand
Register Indirect (Auto Increment and Decrement)
The operand is the memory addressed by the X register
This mode automatically increments or decrements the X
register (by 1 for bytes and by 2 for words)
Register Indirect Auto Increment and Decrement)
with Conditional Skip
The operand is the memory addressed by the B register
This mode automatically increments or decrements the B
register (by 1 for bytes and by 2 for words) The B register is
then compared with the K register A skip condition is gener-
ated if B goes past K
ADDRESSING MODES WITH DIRECT MEMORY
AS DESTINATION
Direct Memory to Direct Memory
The instruction contains two 8- or 16-bit address fields One
field directly points to the source operand and the other field
directly points to the destination operand
Immediate to Direct Memory
The instruction contains an 8- or 16-bit address field and an
8- or 16-bit immediate field The immediate field is the oper-
and and the direct field is the destination
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