PC87591E Datasheet, PDF (363/437 Pages) National Semiconductor (TI) – LPC Mobile Embedded Controllers

Host-Controlled Modules and Host Interface (Continued)
6.2.14 Battery-Backed RAMs and Registers
The RTC has two battery-backed RAMs and 17 registers, used by the logical units themselves. Battery-backup power en-
ables information retention during system power down.
The RAMs are:
● _{Standard RAM}
● _{Extended RAM}
The memory maps and register content of the RAMs are shown in Section 6.2.18 on page 371 and illustrated in Figure 122.
The first 14 bytes and three programmable bytes of the Standard RAM are overlaid by time, alarm data and control registers.
The remaining 111 bytes are general-purpose memory.
Registers with reserved bits should be written using the “Read-Modify-Write” method.
All register locations within the device are accessed by the RTC Index and Data registers (at base address and base ad-
dress+1, as defined by RTC configuration registers at index 60₁₆ and 61₁₆). The Index register points to the register location
being accessed, and the Data register contains the data to be transferred to or from the location. An additional 128 bytes of
battery-backed RAM (also called Extended RAM) may be accessed via a second pair of Index and Data registers (at base
address and base address+1, as defined by RTC configuration registers in index 62₁₆ and 63₁₆).
Access to the two RAMs may be locked. For details, see ”RAM Lock Register (RLR)” in Section 6.1.12 on page 353.
The index of three of the RTC registers is programmable using registers in the RTC logical device bank (part of the SuperI/O
configuration registers). If enabled, these registers override three of the Standard RAM locations; see Section 6.1.12 on
page 353.
SIO Configuration
Standard Bank
(Legacy 0x70, 0x71)
7F₁₆
Extended Bank
(Legacy 0x72, 0x73)
7F₁₆
7F₁₆
73₁₆
70₁₆
prog. indexes
RAM lock
Standard RAM
(3-byte override by
register with
programmable indexes)
63₁₆
}
60₁₆
}
Index
Data
0E₁₆
0D₁₆
00₁₆
Index
Data
Base Base+1
Registers
00₁₆
Index
Data
Base Base+1
Figure 122. RTC Module Registers Mapping
6.2.15 RTC Registers
The RTC registers can be accessed at any time during normal operation mode; i.e., when V_CC is within the recommended
operation range. This access is disabled during battery-backed operation. Write operation to these registers is also disabled
if bit 7 of CRD register is 0.
Note: Before attempting to perform any start-up procedures, read the explanation of bit 7 (VRT) of CRD register.
See Section 6.2.18 on page 371 for a detailed description of the memory map for the RTC registers.
This section describes the RTC Timing and Control registers, which control basic RTC functionality.
For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34.
Revision 1.07
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