COP8TAB9 Datasheet, PDF (31/59 Pages) National Semiconductor (TI) – 8-Bit CMOS Flash Microcontroller with 2k Byte or 4k Byte Memory

13.0 Power Save Modes (Continued)
and LWKPND registers contain undefined values after reset,
so software should clear these bits after reset to ensure that
no spurious Wake-Up events or interrupts are left pending.
CWKEN and LWKEN are read/write registers that are
cleared at reset, so no Wake-Up events or interrupts are
enabled following reset. CWKEDG and LWKEDG are also
cleared at reset.
FIGURE 24. Multi-Input Wake-Up Logic
20047581
14.0 Interrupts
14.1 INTRODUCTION
The device supports eleven vectored interrupts. Interrupt
sources include Timer 1, Timer 2, Timer T0, Multi-Input
Wake-Up, Software Trap, MICROWIRE/PLUS and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 13 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 25 shows the Interrupt block diagram.
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