COP8TAB9 Datasheet, PDF (13/59 Pages) National Semiconductor (TI) – 8-Bit CMOS Flash Microcontroller with 2k Byte or 4k Byte Memory

8.0 Electrical Characteristics (Continued)
FIGURE 3. ACB Start Condition Timing
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FIGURE 4. ACB Data Timing
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9.0 Pin Descriptions
The COP8TAB9/TAC9 I/O structure enables designers to
reconfigure the microcontroller’s I/O functions with a single
instruction. Each individual I/O pin can be independently
configured as output pin low, output high, input with high
impedance or input with weak pull-up device. A typical ex-
ample is the use of I/O pins as the keyboard matrix input
lines. The input lines can be programmed with internal weak
pull-ups so that the input lines read logic high when the keys
are all open. With a key closure, the corresponding input line
will read a logic zero since the weak pull-up can easily be
overdriven. When the key is released, the internal weak
pull-up will pull the input line back to logic high. This elimi-
nates the need for external pull-up resistors. The high cur-
rent options are available for driving LEDs, motors and
speakers. This flexibility helps to ensure a cleaner design,
with fewer external components and lower costs. Below is
the general description of all available pins.
V_CC and GND are the power supply pins.
Users of the LLP package are cautioned to be aware that the
central metal area and the pin 1 index mark on the bottom of
the package may be internally connected to GND. See figure
below:
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