COP87L88EB Datasheet, PDF (21/72 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART

Functional Block Description of
the CAN Interface (Continued)
Receive/Transmit (Rx/Tx) Registers
The Rx/Tx registers are 8-bit shift registers controlled by the
TCL and the BSP. They are loaded or read by the Interface
Management Logic, which holds the data to be transmitted
or the data that was received.
Bit Time Logic (BTL)
The bit time logic divider divides the CKI input clock by the
value defined in the CAN prescaler (CSCAL) and bus timing
register (CTIM). The resultig bit time (tcan) can be computed
by the formula:
Where divider is the value of the clock prescaler, PS is the
programmable value of phase segment 1 and 2 (1..8) and
PPS the programmed value of the propagation segment
(1..8) (located in CTIM).
Bus Timing Considerations
The internal architecture of the CAN interface has been op-
timized to allow fast software response times within mes-
sages of more than two data bytes. The TBE (Transmit
Buffer Empty) bit is set on the last bit of odd data bytes when
CAN internal sample points are high.
It is the user’s responsibility to ensure that the time between
setting TBE and a reload of TxD2 is longer than the length of
phase segment 2 as indicated in the following equation:
Table 3 shows examples of the minimum required t_LOAD for
different CSCAL settings based on a clock frequency of
10 MHz. Lower clock speeds require recalculation of the
CAN bit rate and the mimimum t_LOAD.
TABLE 3. CAN Timing (CKI = 10 MHz, t_c = 1 µs)
PS CSCAL
4
3
CAN Bit Rate (kbit/s)
250
Minimum
t_LOAD (µs)
2.0
4
9
100
5.0
4
15
62
8.0
4
24
40
12.5
4
39
25
20
4
99
10
50
4
199
5
100
FIGURE 15. Bit Rate Generation
Figure 16 illustrates the minimum time required for t_LOAD.
DS100044-17
FIGURE 16. TBE Timing
DS100044-18
In the case of an interrupt driven CAN interface, the calcula-
tion of the actual t_LOAD time would be done as follows:
INT:
;Interrupt latency = 7tc = 7 µs
PUSH A ; 3tc = 3 µs
LD A,B ; 2tc = 2 µs
PUSH A ; 3tc = 3 µs
VIS
; 5tc = 5 µs
CANTX: ;20tc = µs to this point
•
;additional time for instructions
;which check
•
;status prior to reloading the
;transmit data
•
;registers with subsequent data
;bytes.
LD TXD2,DATA
•
•
•
Interrupt driven programs use more time than programs
which poll the TBE flag, however programs which operate at
lower baud rates (which are more likely to be sensitive to this
issue) have more time for interrupt response.
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