COP87L88EB Datasheet, PDF (1/72 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART

September 1999
COP87L88EB/RB Family
8-Bit CMOS OTP Microcontrollers with 16k or 32k
Memory, CAN Interface, 8-Bit A/D, and USART
General Description
The COP87L88EB/RB Family OTP (One Time program-
mable) microcontrollers are highly integrated COP8™ Fea-
ture core devices with 16k or 32k memory and advanced
features including a CAN 2.0B (passive) interface, A/D and
USART. These multi-chip CMOS devices are suited for appli-
cations requiring a full featured controller with a CAN inter-
face, low EMI, and versatile communications interfaces, and
as pre-production devices for ROM designs. Pin and soft-
ware compatible 8k ROM versions (COP888EB) are avail-
able as well as a range of COP8 software and hardware de-
velopment tools.
Features include an 8-bit memory mapped architecture, 10
MHz CKI (-XE = crystal oscillator) with 1µs instruction cycle,
two multi-function 16-bit timer/counters, WATCHDOG and
clock monitor, idle timer, CAN 2.0B (passive) interface,
MICROWIRE/PLUS™ serial I/O, SPI master/slave interface,
fully buffered USART, 8 bit A/D with 8 channels, two power
saving HALT/IDLE modes, MIWU, software selectable I/O
options, low EMI 4.5V to 5.5V operation, program code se-
curity, and 44/68 pin packages.
Note: A companion device with CAN interface, less I/O and
memory, A/D, and PWM timer is the COP87L84BC.
Devices included in this datasheet are:
Device
COP87L88EB
COP87L89EB
COP87L88RB
COP87L89RB
Memory (bytes)
16k OTP EPROM
16k OTP EPROM
32k OTP EPROM
32k OTP EPROM
RAM (bytes)
192
192
192
192
I/O Pins
35
58
35
58
Packages
44 PLCC
68 PLCC
44 PLCC
68 PLCC
Temperature
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
Key Features
n CAN 2.0B (passive) bus interface, with Software Power
save mode
n 8-bit A/D Converter with 8 channels
n Fully buffered USART
n Multi-input wake up (MIWU) on both Port L and M
n SPI Compatible Master/Slave Interface
n 16 or 32 kbytes of on-board OTP EPROM with security
feature
Note: Mask ROMed device with equivalent on-chip features and program
memory size of 8k is available.
n 192 bytes of on-board RAM
Additional Peripheral Features
n Idle timer (programmable)
n Two 16-bit timer, with two 16-bit registers supporting
— Processor independent PWM mode
— External Event counter mode
— Input capture mode
n WATCHDOG™ and Clock Monitor
n MICROWIRE/PLUS serial I/O
I/O Features
n Software selectable I/O options (TRI-STATE^® outputs,
Push pull outputs, Weak pull up input, High impedance
input)
n Schmitt trigger inputs on Port G, L and M
n Packages: 44 PLCC with 35 I/O pins;
68 PLCC with 58 I/O pins
CPU/Instruction Set Features
n 1 µs instruction cycle time
n Fourteen multi-sourced vectored interrupts servicing
— External interrupt
— Idle Timer T0
— Timers (T1 and T2) (4 Interrupts)
— MICROWIRE/PLUS and SPI
— Multi-input Wake up
— Software Trap
— CAN interface (3 interrupts)
— USART (2 Inputs)
n Versatile easy to use instruction set
n 8-bit stacker pointer (SP) (Stack in RAM)
n Two 8-bit RegisterR Indirect Memory Pointers (B, X)
Fully Static CMOS
n Two power saving modes: HALT, IDLE
n Single supply operation: 4.5V to 5.5V
n Temperature range: −40˚C to +85˚C
Development Support
n Emulation device for COP888EB
n Real time emulation and full program debug offered by
MetaLink Development System
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
COP8™, MICROWIRE/PLUS™, WATCHDOG™ and MICROWIRE™ are trademarks of National Semiconductor Corporation.
iceMASTER^® is a registered trademark of MetaLink Corporation.
© 2000 National Semiconductor Corporation DS100044
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