MC68HC08AZ32 Datasheet, PDF (60/424 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
CPU during break interrupts
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. See Break Module on page 123. The program
counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor mode).
A return from interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
Instruction Set Summary
Table 1 provides a summary of the M68HC08 instruction set.
MC68HC08AZ32
58
Central Processor Unit (CPU)
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