MC68HC08AZ32 Datasheet, PDF (247/424 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Timer Interface Module A (TIMA)
I/O Signals
I/O Signals
Ports E and F each share two pins with the TIM and Port D shares one.
PTD6/TACLK is an external clock input to the TIMA prescaler. The four
TIMA channel I/O pins are PTE2/TACH0, PTE3/TACH1, PTF0/TACH2,
and PTF1/TACH3.
TIMA clock pin
(PTD6/TACLK)
PTD6/TACLK is an external clock input that can be the clock source for
the TIMA counter instead of the prescaled internal bus clock. Select the
PTD6/TACLK input by writing logic ones to the three prescaler select
bits, PS[2:0]. See TIMA status and control register (TASC) on page 246.
The minimum TACLK pulse width, TACLK_LMIN or TACLK_HMIN, is:
----------------1-----------------
bus frequency
+
t_SU
The maximum TCLK frequency is:
bus frequency ÷ 2
PTD6/TACLK is available as a general-purpose I/O pin when not used
as the TIMA clock input. When the PTD6/TACLK pin is the TIMA clock
input, it is an input regardless of the state of the DDRD6 bit in data
direction register D.
TIMA channel I/O
pins
(PTF1/TACH3ÐPTE2
/TACH0)
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTF0/TACH2 and PTE3/TACH1
can be configured as buffered output compare or buffered PWM pins.
15-tima
MOTOROLA
Timer Interface Module A (TIMA)
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AZ32
245