MC68HC08AZ32 Datasheet, PDF (122/424 Pages) Motorola, Inc – Advance Information

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Freescale Semiconductor, Inc.
Functional description
Bit 7
6
5
4
3
2
1
MORA
$001F
Read: LVISTOP ROMSEC LVIRSTD LVIPWRD SSREC COPRS
Write:
R
R
R
R
R
R
STOP
R
Reset:
Unaffected by reset
Bit 0
COPD
R
Figure 9. Mask option register A (MORA)
LVISTOP — LVI Stop Mode Enable Bit
LVISTOP enables the LVI module in stop mode. See
Low-Voltage Inhibit (LVI) on page 149.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
SEC — ROM security bit
SEC enables the ROM security feature. Setting the SEC bit prevents
access to the ROM contents.
1 = ROM security enabled
0 = ROM security disabled
LVIRSTD — LVI reset disable bit
LVIRSTD disables the reset signal from the LVI module. See
Low-Voltage Inhibit (LVI) on page 149.
1 = LVI module resets disabled
0 = LVI module resets enabled
LVIPWRD — LVI power disable bit
LVIPWRD disables the LVI module. See Low-Voltage Inhibit (LVI) on
page 149.
1 = LVI module power disabled
0 = LVI module power enabled
MC68HC08AZ32
120
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2-maskops
MOTOROLA