MC92501 Datasheet, PDF (33/52 Pages) Motorola, Inc – ATM Cell Processor

11.4.12. RM Overlay Register (RMOR)
This register contains all the parameters which are related to RM cell overlay. Refer to Section 5.5 for details. The register has
the following structure:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IBOE IFOE
0
0
ROL
ROM
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
ROF
IBOEÑIngress BRM Overlay Enable
This bit determines whether the MC92501 overlays the ROFÑRM Overlay Þeld on the switch parameters for ingress backward
RM cells.
0 = Switch parameters are not overlayed when a backward RM cell is received in the ingress.
1 = Switch parameters are overlayed when a backward RM cell is received in the ingress.
IFOEÑIngress FRM Overlay Enable
This bit determines whether the MC92501 overlays the ROFÑRM Overlay Þeld on the switch parameters for ingress forward
RM cells.
0 = Switch parameters are not overlayed when a forward RM cell is received in the ingress.
1 = Switch parameters are overlayed when a forward RM cell is received in the ingress.
ROLÑRM Overlay Location
This Þeld contains the number of the switch parameters byte which should be overlayed.
ROMÑRM Overlay Mask
This Þeld contains the byte mask which serves for overlaying the ROFÑRM Overlay Þeld over the ingress switch parameters byte.
ROFÑRM Overlay
This Þeld contains the byte which is overlayed on the ingress switch parameters byte. Each bit in this Þeld is overlayed on the
corresponding bit in the ingress switch parameters only if it is enabled by the corresponding bit in the ROMÑRM Overlay Mask Þeld.
11.4.13. CLP Transparency Overlay Register (CTOR)
This register contains the location of the IOCLPÑIngress Overhead CLP bit in the ingress switch parameters. See Section 6
for details. The register has the following structure:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
OCBI
OCBL
OCBLÑIOCLP Byte Location
This Þeld contains the byte number within the switch parameter word on which the IOCLPÑIngress Overhead CLP bit is located.
The most signiÞcant byte is number 0, and the least signiÞcant byte is number 3.
OCBIÑIOCLP Bit Location
This Þeld contains the number of the IOCLPÑIngress Overhead CLP bit within the byte speciÞed by the OCBLÑIOCLP Byte
Location Þeld. The most signiÞcant bit is number 7, and the least signiÞcant bit is number 0.
11.4.14. Context Parameters Extension Table Pointer Register (CPETP)
This register contains the pointer to the Þrst word of the Context Parameters Extension Table. The pointer is in units of 256 bytes.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
CEPTP
0
MOTOROLA
MC92501
33