MC92501 Datasheet, PDF (30/52 Pages) Motorola, Inc – ATM Cell Processor

EEASÑGlobal EFS Enable
This bit enables the MC92501 to use the EFSÑOverhead Egress Flow Status bit in the egress switch overhead. See
Section 5.4.2 for details.
0 = The EFSÑOverhead Egress Flow Status bit is not deÞned in the egress overhead Þelds so it cannot trigger ABR cell
marking.
1 = The EFSÑOverhead Egress Flow Status bit is deÞned in the egress overhead Þelds and is used by the MC92501 for
marking cells.
VPSÑVPI Size in ECI on Header Mode
This bit determines the size of the VPI Þeld for ECI on Header mode (IHAF = 1). See Section 9 for details.
0 = VPI size is 12 bits
1 = VPI size is 8 bits
11.4.5. Egress Switch Overhead Information Register 0 (ESOIR0)
This register name was ESOIR on MC92500.
The following deÞnition is changed:
MTBI-MTTS Bit Location
This Þeld indicates the location of the MTTS Þeld within the byte speciÞed by the MTBY-MTTS Byte Location Þeld.
0 = MTTS equals the value that resides in bits 7:5 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
1 = MTTS equals the value that resides in bits 7:6 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
2 = MTTS equals the value that resides in bit 7 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
3 = MTTS equals the value that resides in bits 3:0 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
4 = MTTS equals the value that resides in bits 4:1 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
5 = MTTS equals the value that resides in bits 5:2 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
6 = MTTS equals the value that resides in bits 6:3 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
7 = MTTS equals the value that resides in bits 7:4 of the byte pointed to by the MTBY-MTTS Byte Location Þeld.
Note that this deÞnition is backwards-compatible to the deÞnition in MC92500.
11.4.6. Microprocessor Configuration Register (MPCONR)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DO
0
0
0 WSSM 0
0
RQ0
0
RQ1
0
RQ2
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
MDC
0 DDDS 0
DDGR
0
DDEM
0
DDCI
0
DDCE
WSSMÑWord Select Signals Mode
This bit deÞnes the functionality of the MP Word Write Enable High / Address 1 (MWSH/A1) and the MP Word Write Enable
Low / SIZE (MWSL/SIZE) signals. See Section 8.1.3 for details.
0 = MWSH/A1 functions as MWSH-word write enable high and MWSL/SIZE functions as MWSL-word write enable low.
1 = MWSH/A1 functions as A1 and MWSL/SIZE functions as SIZE.
RQ0ÑMREQ0 Signal Functionality
This Þeld deÞnes the functionality of the MP Request 0 (MREQ0) signal. See Section 8.1.2 for details.
00 = Cell in request
01 = Cell in request
10 = Cell out request
11 = External memory request
RQ1ÑMREQ1 Signal Functionality
This Þeld deÞnes the functionality of the MP Request 1 (MREQ1) signal. See Section 8.1.2 for details.
00 = Cell out request
01 = Cell in request
10 = Cell out request
11 = External memory request
MC92501
30
MOTOROLA