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MC92501 Datasheet, PDF (13/52 Pages) Motorola, Inc – ATM Cell Processor | |||
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5.4. Cell Marking (CI, NI, PTI)
Figure 10 illustrates two MC92501 devices connected to a
switch fabric. In this example, the ABR Ãow travels from left to
right. This means that data cells are Ãowing from left to right,
FRM cells are Ãowing from left to right, and BRM cells are
Ãowing from right to left. The switch marks FRM and user cells
Ingress Flow Status
Ãowing downstream, and BRM cells Ãowing upstream. This
switch function can be implemented in the ingress of MC92501
#1 and in the egress of MC92501 #2. MC92501 #1 marks cells
because of the ingress Ãow status (for example, ingress Ãow
congestion) while MC92501 #2 marks cells because of the
egress Ãow status.
Egress Flow Status
Ingress User Cell Marking (EFCI)
Egress User Cell Marking (EFCI)
Ingress FRM Cell Marking (CI or NI)
Egress BRM Cell Marking (CI or NI)
Egress FRM Cell Marking (CI or NI)
Ingress BRM Cell Marking (CI or NI)
EFCI, FRM
BRM
Ingress
Egress
MC92501 #1
Switch Fabric
Egress
Ingress
MC92501 #2
Downstream Direction
Upstream Direction
Figure 10. ABR Flow Cell Marking Example
The MC92501 can take the following actions in response to
the ingress Ãow status:
Â¥ Perform EFCI marking on ingress cells; i.e., set PTI[1] bit
in cells on which PTI[2] = 0.
Â¥ Set CI or NI in ingress FRM cells.
Â¥ Set CI or NI in egress BRM cells.
The MC92501 can take the following actions in response to
the egress Ãow status:
Â¥ Perform EFCI marking on egress cells; i.e., set PTI[1] bit
in cells on which PTI[2] = 0.
Â¥ Set CI or NI in egress FRM cells.
Â¥ Set CI or NI in ingress BRM cells.
Figure 11 is an overview of the MC92501 marking scheme.
MOTOROLA
MC92501
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