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MC6800 Datasheet, PDF (28/32 Pages) Motorola, Inc – 8-BIT MICROPROCESSING UNIT (MPU)
I
FIGURE 31 – EXTENDED ADDRESSING MODE
MPU
MPu
RAM
R
RAM
I
ADOR
DATA
ADDR = 300
PROGRAM
w%MEMORY
INSTR
Pc
ADDR
MADDR
“
AODR > 256
GENERAL FLOW
PROGRAM
MEMORY
I
PC = 5006
LDA B
300
5009
@
EXAMPLE
TABLE 9 – EXTENDED MODE CYCLE-BY-CYCLE
Address Mode
and Instructions
Cycles
Cycle
=
VMA
Line
STS
1
STX
2
OP Code
Address of Operand
(High Order Byte)
3
6
4
Address of Operand (Low Order Byte)
Irrelevant Data (Note 1 )
5
Operand Data (High Order Byte)
6
Operand Data (Low Order Byte)
JSR
1
Op Code
2
Address of Subroutine (High Order Byte)
3
4
9
5
6
7
8
9
Address of Subroutine ( LOW Order BVte)
1
3P Code of Next Instruction
L0
Return Address (Low
0
Return Address (High
1
Irrelevant Oata (Note
1
Irrelevant Data (Note
1
Address of Subroutine
Order
Order
1)
1)
(Low
Bvte)
BVte)
Order
Bvte)
---
1
Op Code
3
Op Code Address + 1
II
Jump Address (High Order Bvte)
OP Code Address + 2
wOP Code Address
OP Code Address + 2
Address of Operand
1
Jump Address ( LOW Order Bvte)
1
Op Code
Address of Operand (High Order BVte)
Address of Operand (Low Order Bvte)
Operand Data
Op Code
1
Address
Address
of Operand
of Operand
(High Order BVte)
(LOW Order BVte)
I1
Operand Data (High Order BVte)
Address of Operand + 1
1
Operand Data (LOW Order Bvte)
OP Code Address
1
Op Code
Op Code Address + 1
1
Destination Address (High Order Bvte)
Op Code Address + 2
1
Destination Address ( Low Order Bvte)
Operand
Operand
Destination
Destination
Address
Address
1
Irrelevant Oata (Note 1 )
o
Data from Accumulator
ASL LSR
ASR NEG
CLR ROL
COM ROR
DEC TST
6
INC
Op Code Address
Op Code Address + 1
Op Code Address + 2
Address of Operand
Address of Operand
1
OP Code
II
1
Address
Address
of Operand
of Operand
(High Order Bvte)
(Low Order Bvte)
I1
Current Operand Data
1
Irrelevant Data (Note 1 )
Address of Operand
o
New Operand Data (Note 2)
..
~te 1. It device which IS addressed during this cvcle uses VMA, then the Data Bus will go to the high impedance
Depending on bus capacitance, data from the previous cycle mav ba retatned on the Data Bus.
Note 2. For TST, VMA = O and Operand data does not change,
three-state
condition,
MOTOROLA
@
Semiconductor Products Inc.
28