MC6800 Datasheet, PDF (24/32 Pages) Motorola, Inc – 8-BIT MICROPROCESSING UNIT (MPU)

1
* :’@o
Operator
Comment
TSTB
TEST CONTENTS OF ACCB
or
TSTA
TEST CONTENTS OF ACCA
mode, the “address” of the operand is effectively the
memory location immediately following the instruction itself.
—
Table 7 shows the cycle-by-cycle operation for the im-
mediate addressing mode.
A number of the instructions either alone or together with
Direct and Extended Addressing Modes – In the Direct
an accumulator operand contain all of the address informa-
and Extended modes of addressing, the operand field of the
tion that is required, that is, “inherent” in the instruction
source statement is the address of the value tha$+i$j~o be
itself. For instance, the instruction ABA causes the MPU to
operated on. The Direct and Extended modes d~ff~$:fi$y in
add the contents of accumulators A and B together and place
the range of memory locations to which they ~$~~trect the
the result in accumulator A. The instruction INCB, another
M PU. Direct addressing generates a sin~l~.~~%~ operand
example of “accumulator addressing,” causes the contents
and, hence, can address only memory l@~&&~’& O through
of accumulator B to be increased by one. Similarly, INX, in-
255; a two byte operand is generated~{&~QEx&&~ded address-
crement the Index Register, causes the contents of the Index
ing, enabling the MPU to reach theik~~~J&”hg memory loca-
Register to be increased by one.
tions, 256 through 65535. An ex~&pl$ O* Direct addressing
Program flow for instructions of this type is illustrated in
and its effect on program flo,~~~ ~&lrated in Figure 30.
Figures 27 and 28. In these figures, the general case is shown
The M PU, after encoun\eW@<~e opcode for the instruc-
on the left and a specific example is shown on the right.
tion LDAA (Direct) at,~~ary
location 5004 (Program
Numerical examples are in decimal notation. Instructions of
Counter= 5004), look~~~~$~:~next location, 5005, for the ad-
this type require only one byte of opcode. Cycle-by-cycle
dress of the operan~$~~~{~~ sets the program counter equal
operation of the inherent mode is shown in Table 6.
to the value foun@ t~~{~100 in the example) and fetches the
operand, in t~~~$$e a value to be loaded into accumulator
Immediate Addressing Mode – In the Immediate address-
A, from th,~+~p~$$n. For instructions requiring a two-byte
ing mode, the operand is the value that is to be operated on.
operande$~hk~ LDX (Load the index Register), the operand
For instance, the instruction
bytes $+~4&Be retrieved from locations 100 and 101. Table 8
Oper*or
LDAA
Operand
#25
Comment
LOAD 25 INTO ACCA
sh%~ws t~~ cycle-by-cyc4e operation for the direct mode of
a*~ssi ng,
,~~’+i$xt~nded addressing, Figure 31, is similar except that a
causes the M PU to “immediately load accumulator A with
:t:~:+~@-byte address is obtained from locations 5007 and 5008
the value 25’; no further address reference is required. The ~~,,.$$tafter the LDAB (Extended) opcode shows up in location
Immediate mode is selected by preceding the operand value
“e$s 5006. Extended addressing can be thought of as the “stan-
with the “#” symbol. Program flow for this addressing my,.~.\de ^~y>t,$ dard” addressing mode, that is, it is a method of reaching
—
is illustrated in Figure 29.
.*.,.J.$,i~>>,
any place in memory. Direct addressing, since only one ad-
The operand format allows either properly define$:$ym
dress byte is required, provides a faster method of process-
bols or numerical values. Except for the instru~ti~~’WX,
ing data and generates fewer bytes of control code. In most
LDX, and LDS, the operand may be any valu~,i~:~e,;~nge O
applications, the direct addressing range, memory locations
to 255. Since Compare Index Register (C&,~Q$.~~&’d Index
Register (LDX), and Load Stack Pointer (~$~;.$e~uire 16-bit
O-255, are reserved for RAM. They are used for data buffer-
ing and temporary storage of system variables, the area in
values, the immediate mode for these~%re~+ ~tistructions re-
which faster addressing is of most value. Cycle-by-cycle
quire two-byte operands. In th~:T~,Yate
addressing
operation is shown in Table 9 for Extended Addressing.
PROGRAM
4^MEMORY
Pc
INSTR
MPu
INDEX
z^a
@ ^RAM
PROG RAM
MEMORY
PC = 5000
INX
t
I
GENERAL FLOW
EXAMPLE
FIGURE Z – ACCUMULATOR ADDRESSING
MPU
RAM
F
mMPu
ACCB
m
RAM
pROGRAM
MEMORY
B
aPROGRAM
MEMORY
Pc
INSTR
PC = 5001
INC B
-.
w
GENERAL FLOW
EXAMPLE
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