MC6800 Datasheet, PDF (27/32 Pages) Motorola, Inc – 8-BIT MICROPROCESSING UNIT (MPU)

FIGURE = – IMMEDIATE ADDRESSING MODE
MPU
MPU
ACCA
m
RAM
%
RAM
m
FIGURE 30 – DIRECT ADDRESSING MODE
MPU
MPU
ACCA
m
m RAM
G
RAM
PROGRAM
MEMORY
Pc
INSTR
DATA
ADOR
DATA
*
PROGRAM
MEMORY
II
PROGRAM
MEMORY
I
‘C=’oo‘C’w’*
GENERAL FLOW
EXAMPLE
EXAMPLE
1
Address Mode
and 1nstructions
ADC
ADD
AND
BIT
CMP
CPX
LDS
LDX
EOR
LDA
ORA
SBC
SUB
Cycle VMA
Cycles
# Line
?!i<,,l>;
Addrass Bus _,1?,’ .\.!),,
.f’’’*,..,
1
1
Op Code Address
~.e\ _{s”’$% ‘“}
1
2
2
1
Op Code Address+ 1 ‘~+?<q,~’~
“‘~!-‘,’~,:.!:’,.$....,,,.,.,
1
~..,?t.,,
.Q,.
1
1
Op Code A,,@,.:.,:d..ri.e~s,s *’”
1
3
2
1
OP CodaL$dd~ss + 1
1
3
1
OD C&&hress
+2
1
Data Bus
Op Code
Operand Data
Op Code
Operand Data (High Order Byte)
Oparand Data (Low Order Byte)
Address Mode
[
and Instructions
ADC EOR
ADD LDA
AND ORA
BIT SBC
CMP SUB
,,
Cycles
>.,t~..,.:~~.,
,a.\’. \,.
‘*.,
!.~:
..~~
,.
Addres Bus
Op Code Address
Op Code Address+ 1
Address of Operand
R/~
Line
Data Bus
1
Op Code
1
Address of Operand
1
Operand Data
CPX
LDS
LDX
Op Code Address
Op Code Address + 1
Address of Operand
1
Op Code
1
Address of Operand
1
Operand Data (High Order Byte)
4
1
Operand Address + 1
1
Operand Data (Low Order Byte)
1
1
Op Code Address
1
Op Code
Op Code Address + 1
1
Destination Address
3
0
Destination Address
1
irrelevant Data (Note 1 }
4
1
Destination Address
o
Data from Accumulator
STS
1
1
Op Code Address
1
Op Code
STX
2
1
OP Code Address+ 1
1
Address of Operand
5
3
0
Address of Operand
1
Irrelevant Data (Note 1 )
4
1
Address of Operand
o
Register Oata (High Order Byte)
5
1
Address of Operand + 1
0
Register Data (Low Ordar BVte)
,.,
Note 1. If device which is address during this cvcle uses VMA, then the Data BUS WIII go to ?ne nigh impeaance
Depending on bus capacitance, data from the previous cycle may be retained on the Data Bus.
,.. .
tnree-s~aIe conolrlon.
B ^MOTOROLA
Semiconductor Products Inc.
27