MC6800 Datasheet, PDF (14/32 Pages) Motorola, Inc – 8-BIT MICROPROCESSING UNIT (MPU)

1
OPERATIONS
Add
Add Acmltrs
Add wlfh Carry
And
Blt Tesl
Clear
Compare
Compare Acmltrs
Complement, 1’s
Complement, 2’s
(Negate)
Dec!mal Adi.st, A
Decrement
ExcI”si”e OR
Increment
Load Acmltr
Or, Inclusive
Push Oata
Pull Oata
Rotate Left
Rotate R,ght
Shift Left, Ar!thmet!c
Sh[ft Right, Arfthmet!c
Sh!f! Right, Logic
Store Acmltr.
Subtract
Subtracf Acmltrs.
MNEMONIC
ADDA
ADOB
ABA
AOCA
AOCB
ANDA
ANOB
BITA
BITE
CLR
CLRA
CLRB
CMPA
CMPB
CBA
COM
COMA
COMB
NEG
NEGA
NEGB
OAA
OEC
oECA
OECB
EORA
EORB
INC
INCA
INCB
LOAA
LDAB
O RAA
ORAB
PSHA
?SHB
PU LA
PU LB
ROL
ROLA
ROLB
ROR
RORA
RORB
ASL
ASLA
ASLB
ASR
ASRA
ASRB
LSR
LSRA
LSRB
-----
lABLt
- . . . . . .. .. ---- . . .. . .. . . . . .. ---- .-,-. ,-
Z — ALUUMULAIUR
AND MtMUMY
UrErnAt
IUN>
AOORESSING MOOES
BOOLEAN/ARITHMETIC
OPERATf ON
INOEX
1P-=
EXTNO
IMPLIEO
1P-=
(All register labels
refer to contents)
B21
F21
F21
121
1321
i321
lo2f
io21
1921
IA21
,A21
1C21
iC21
A+ M-A
B+M+B
1 A+ MSp, SP-f-SP
1 B-, Msp, SP–l+SP
1 SP+I-SP,
MSP-A
I SP+I+SP, MSP-B
M
!9 2 1 A
j9 2 1 B }L-’’’’””Jc
M
b7 -
bO
!6 2 1 A
j6 2 1 B lk-’’’’”[dc
b7 — bO
$8 2 1
58 2 1
a7 2 1
57 2 1
44 2 1
54 2 1
10 2 1
16 2 I
17 2 1
$0 2 1
50 2 1
—
M
A
o-~
B}
b7
A’-M
B-M
A– M-A
B– M-B
A– B-A
A–M– C-A
B- M– C-B
A-B
B-A
M–00
A–00
B–DO
-0
bO
C
Arithmetic Minus;
Boolean ANO:
MSP contents Of memow location pointed to be Stack Pointer:
Boolean Inclusive OR;
&
Boolean Exclusive OR;
M Complement of M;
+
Transfer Into;
o
Bit = Zero;
00 Byte = Zero;
CON OtTION CODE SYMBOL5
H Hal f.carrv from bit 3;
I
Interrupt mask
N Negative (tign bit)
z
Zero (byte)
v
Ovetilow, 2’s complement
c
Carv from bit 7
R Rewt Always
s
Set Alwav$
t
Test and set if true, cleared otherwise
q
Not Affected
CON OITION COOE REGISTER NOTES:
(Bit Set if testis true and cleared otherwise]
1 (Bit V) Test: Result = 1000OOOO7
2
(Bit C) Test: Result = 000000007
3
(Bit C) Test: Oecimal value of most significant BCO
Character greater than nine?
( Not cleared if previously set.]
4
(Bit V) Test: Operand= 10000000 prior to execution?
5
(Bit V) Test: Operand= 01111111 prior to execution?
6
(Bit V) Test: Set equal to result of N@C after shift has occurred
Note – Accumulator addresbng mode instructions are included in tho column for IMPLIEO addressing
MOTOROLA
@
Semiconductor Products Inc.
14
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