M37754FFCGP Datasheet, PDF (7/68 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION

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Pin
Name
P100–P107 I/O port P10
P110–P117 I/O port P11
MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
Input/
Output
I/O
Functions
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, these pins become data I/O pins and
operate as follows:
(1) When using 16-bit width as external data bus width:
• Accessing external memory
<When reading>
Pins’ value is input into low-order internal data bus (DB0 to DB7).
<When writing>
Value of low-order internal data bus (DB0 to DB7) is output to these pins.
• Accessing internal memory
<When reading>
These pins enter high impedance state.
<When writing>
Value of internal data bus is output to these pins.
(2) When using 8-bit width as external data bus width:
• Accessing external memory
<When reading>
Pins’ value is input into internal data bus. The value is input into low-order
internal data bus (DB0 to DB7) when accessing an even address; it is input
into high-order internal data bus (DB8 to DB15) when accessing an odd
address.
<When writing>
Value of internal data bus is output to these pins. The value of low-order
internal data bus (DB0 to DB7) is output when accessing an even address;
the value of high-order internal data bus (DB8 to DB15) is output when
accessing an odd address.
• Accessing internal memory
<When reading>
These pins enter high impedance state.
<When writing>
Value of internal data bus is output to these pins.
When the external bus_w__idth _is__ 8 bits, the mode where low-order address (LA0
– LA7)_i_s_outp_u_t_when RD or WR output is “H” and data (D0 – D7) is input/output
when RD or WR output is “L” can be selected in specified external memory area
access cycle.
I/O ^{In single-chip mode, these pins have the same functions as port P0. In memory}
expansion mode or microprocessor mode, these pins operate as follows:
(1) When using 16-bit width as external data bus width
• Accessing external memory
<When reading>
The value is input into high-order internal data bus (DB8 to DB15) when
accessing an odd address; these pins enter high impedance state when not
accessing an odd address.
<When writing>
Value of high-order internal data bus (DB8-DB15) is output to these pins.
• Accessing internal memory
<When reading>
These pins enter high impedance state.
<When writing>
Value of internal data bus is output to these pins.
(2) When using 8-bit width as external data bus width
These pins become I/O port P110 – P117.
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