M37754FFCGP Datasheet, PDF (37/68 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION

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MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
AVCC
VI
VI
Parameter
Power source voltage
Analog power source voltage
Input voltage RESET, CNVSS, BYTE
Input voltage P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
P50–P57, P60–P67, P70–P77, P80–P87, P90–P95,
P100–P107, P110–P117, VREF, XIN
Output voltage P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
VO
P50–P57, P60–P67, P70–P77, P80–P87, P90–P95,
P100–P107, P110–P117, XOUT, E
Pd
Power dissipation
Topr
Operating temperature
Tstg
Storage temerature
Note: For the CNVss pin, this is 12.6 V when programming to the flash memory.
Ratings
Unit
–0.3 to 7
V
–0.3 to 7
V
–0.3 to 12 (Note)
V
–0.3 to VCC+0.3
V
–0.3 to VCC+0.3
V
300
mW
–20 to 85
°C
–40 to 150
°C
RECOMMENDED OPERATING CONDITIONS (Vcc = 5 V±10 %, Ta = -20 to 85 °C, unless otherwise noted)
Symbol
VCC
AVCC
VSS
AVSS
VIH
VIH
VIH
VIL
VIL
VIL
Parameter
Supply voltage
Analog supply voltage
Supply voltage
Analog supply voltage
High-level input voltage P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
_P_5_0_–_P_57, P60–P67, P70–P77, P80–P87, P90–P95, XIN,
RESET, CNVSS, BYTE
High-level input voltage P100–P107, P110–P117 (in single-chip mode)
High-level input voltage P100–P107, P110–P117
(in memory expansion mode and microprocessor mode)
Low-level input voltage P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
_^P_⁵_0_–_P_57, P60–P67, P70–P77, P80–P87, P90–P95, XIN,
RESET, CNVSS, BYTE
Low-level input voltage P100–P107, P110–P117 (in single-chip mode)
Low-level input voltage P100–P107, P110–P117
(in memory expansion mode and microprocessor mode)
Min.
4.5
0.8 VCC
0.8 VCC
0.5 VCC
0
0
0
Limits
Typ.
5.0
VCC
0
0
Max.
Unit
5.5
V
V
V
V
VCC
V
VCC
V
VCC
V
0.2 VCC
V
0.2 VCC
V
0.16 VCC V
IOH(peak)
IOH(peak)
IOH(avg)
IOH(avg)
IOL(peak)
IOL(peak)
IOL(avg)
IOL(avg)
f(XIN)
High-level peak output current P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
P50–P57, P60–P67, P70–P77, P80–P87, P90–P92, P95,
P100–P107, P110–P117
P93, P94
High-level average output current P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
P50–P57, P60–P67, P70–P77, P80–P87, P90–P92, P95,
P100–P107, P110–P117
P93, P94
Low-level peak output current P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
P54–P57, P60–P67, P70–P77, P80–P87, P90, P95,
P100–P107, P110–P117
P50–P53, P91–P94
Low-level average output current P00–P07, P10–P17, P20–P23, P27, P30–P33, P40–P47,
P54–P57, P60–P67, P70–P77, P80–P87, P90, P95,
P100–P107, P110–P117
P50–P53,P91–P94
External clock frequency input (Note 3) Low-speed running
High-speed running
–10
mA
–20
mA
–5
mA
–15
mA
10
mA
20
mA
5
mA
15
mA
25
40
MHz
Notes 1: Average output current is the averaage value of a 100 ms interval.
2: The sum of IOL(peak) for ports P0, P1, P2, P3, P8, P10, and P11 must be 80 mA or less, the sum of IOH(peak) for ports P0, P1, P2,
P3, P8, P10, and P11 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, P7, and P9 must be 110 mA or less, the
sum of IOH(peak) for ports P4, P5, P6, P7, and P9 must be 80 mA or less.
3: When the clock source select bit is “1,” f(XIN)’s maximum limit is 12.5 MHz at low-speed running and is 20 MHz at high-speed
running.
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