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M37754FFCGP Datasheet, PDF (47/68 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION | |||
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ITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
Timing requirements (VCC = 5 V±10 %, VSS = 0 V, Ta = â20 to 85 °C, f(XIN) = 25 MHz when the clock source select bit = â0ââ, unless
otherwise noted)
V The rise and fall time of input signal must be 100 ns or less respectively, unless otherwise noted.
Memory expansion and Microprocessor mode : Low-speed running
Symbol
Parameter
Limits
Min.
Max.
Unit
tc
External clock input cycle time (Note 1)
40
ns
tw(H)
External clock input high-level pulse width (Note 2)
tc/2 â 8
ns
tw(L)
External clock input low-level pulse width (Note 2)
tc/2 â 8
ns
tr
External clock rise time
8
ns
tf
External clock fall time
8
ns
tsu(DH-RD)
High-order data input setup time (BYTE = âLâ)
30
ns
tsu(DL-RD)
Low-order data input setup time
30
ns
tsu(PiDâRD)
Port Pi input setup time (i = 4â9, 11)
60
ns
th(RD-DH)
High-order data input hold time (BYTE = âLâ)
0
ns
th(RD-DL)
Low-order data input hold time
0
ns
th(RDâPiD)
Port Pi input hold time (i = 4â9, 11)
0
ns
60 (2-Ï access)
tsu(AâDL/DH) Data setup time with address stabilized (Note 3)
140 (3-Ï access) ns
220 (4-Ï access)
60 (2-Ï access)
tsu(CSâDL/DH) Data setup time with chip select stabilized (Note 3)
140 (3-Ï access) ns
220 (4-Ï access)
55 (2-Ï access)
tsu(LAâDL)
Data setup time with address stabilized (Note 3)
135 (3-Ï access) ns
215 (4-Ï access)
â: f(XIN) = 12.5 MHz when the clock source selet bit = â1â
Notes 1: When the clock source select bit = â1â, tcâs minimum limit is 80 ns.
2: When the clock source select bit = â1â, set tw(H)/tc and tw(L)/tc ratios to 45 to 55 %.
3: Since the values depend on external clock input frequency f(XIN), calculate them using the bus timing data formula on the page after
the next page.
47
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