GP2021 Datasheet, PDF (20/62 Pages) Mitel Networks Corporation – GPS 12 channel Correlator Advance Information

GP2021
20MHz
INTERNAL
CLOCK
MCLK
ARM_ALE
DBE
NRW
INTERNAL
WRITE
INTERNAL
READ
A<22:20>, A<9:0>
D<15:0>
VALID
VALID
NOTE: NBW is High and NMREQ Low
Fig.19 Correlator write and read cycles
VALID
Debug (Abort) Function
This is a feature designed to aid debugging and functions
as follows:–
In ARM System Mode, the MULTI_FN_IO pin can be
configured as a TRIGGER input to the Debug block via the
IO_CONFIG register (see Detailed Description of Registers).
In this mode a rising edge at the MULTI_FN_IO pin will
generate a valid ARM data Abort sequence at the ABORT pin
as shown in Fig. 20.
MCLK
MULTI_FN_IO
NOPC
NMREQ
ABORT
Fig.20 Debug (Abort) Function
Standard Interface Mode
This mode allows the GP2021 to be interfaced to most
standard 16 and 32 bit microprocessors as shown in Fig. 21.
No memory control is provided, so external glue logic may be
required in order to interface the microprocessor to memory.
20