GP2021 Datasheet, PDF (10/62 Pages) Mitel Networks Corporation – GPS 12 channel Correlator Advance Information

GP2021
1,
3
SIGN 0
AND
MAG 0
SIGN 1
AND
MAG 1
SOURCE
SELECTOR
SELECT
SOURCE
AND
SELECT
MODE
CARRIER
MIXER
1, 2,
3, 6
1,
2
CARRIER
DCO
CARRIER
CYCLE
COUNTER
CODE
MIXER
16 BIT ACCUMULATE
AND DUMP – Q_TRACKING
16 BIT ACCUMULATE
AND DUMP – Q_PROMPT
1, 0
1
CODE
SLEW
C/A CODE
GENERATOR
CODE
DCO
CODE
PHASE
COUNTER
DUMP
EPOCH
COUNTERS
ACCUMS, CODE PHASE, ETC
16 BIT ACCUMULATE
AND DUMP – I_PROMPT
16 BIT ACCUMULATE
AND DUMP – I_TRACKING
IN AND OUT
DATA
BUSSES
Fig.5 Tracking Module block diagram
be a 0. To avoid having an unused LSB in the accumulators,
the values in EARLY–MINUS–LATE mode are halved from
the +2, 0, –2 that results from the calculation (+1 or –1) – (+1
or –1) to +1, 0, –1. This must be considered when choosing
thresholds in the software, as the correlation results will be
exactly half of the values otherwise expected.
At the end of every code sequence (1023 chips in GPS
mode or 511 chips in GLONASS mode) a DUMP signal is
generated to latch the Accumulated Data for use by the signal
tracking software. Each channel is latched separately, as the
satellite signals are not received in phase with each other.
Source Selector
In Real_Input mode the Source Selector selects which
input signal pair to use (SIGN0/MAG0 or SIGN1/MAG1). In
Complex_Input mode SIGN0/MAG0 are passed to the In–
phase arm and SIGN1/MAG1 to the Quadrature arm. The data
is treated as having the values shown in Table 2 below (in both
modes):
Q form. The mixing of the Carrier DCO outputs with the input
signal produces a baseband signal which can have the values
±1, ±2, ±3 and ±6.
Code Mixers
The Code Mixers multiply the I and Q baseband signals
from the Carrier Mixers with both the PROMPT and
TRACKING local replica codes to produce 4 separate
correlation results. The correlation results are passed to the
Accumulate and Dump blocks for integration.
Accumulate and Dump
The Accumulate and Dump blocks integrate the Mixer
outputs over a complete code period of nominally 1ms.
There are 4 separate 16 bit accumulators for each channel.
These represent the correlation of the I and Q signals with the
PROMPT and TRACKING codes, over the integration period.
There is no overwrite protection mechanism on these
registers so the data must be read before the next DUMP.
Sig
Mag
Value
0
1
-3
0
0
-1
1
0
+1
1
1
+3
Table 2 SIGN/MAG values
Carrier Mixers
The Carrier Mixers multiply the digital input signal by the
Carrier DCO digital local oscillator to generate a signal at
baseband. In Real_Input mode both I and Q Carrier DCO
phases are directed to the appropriate mixers. In
Complex_Input mode a single In–Phase Carrier DCO output
is used in both mixers since the input signal is already in I and
10
Code Phase Counter
The Code Phase Counter counts the number of half–chips
of generated code and stores this value in the
CHx_CODE_PHASE register on each TIC.
Code Slew Counter
The Code Slew Counter is used to slew the generated code
by a number of half chips in the range 0 to 2047. In Update
mode the slew occurs following the next DUMP. In preset
mode it occurs at the next TIC. All slew operations are relative
to the current code phase. The Code Slew counter must be
written to each time a slew is required.
During the slewing process the accumulators for the
channel being slewed are inhibited so that the first result is
valid. If a slew is written while a channel is disabled it will occur
as soon as the channel is enabled.