MT40A512M16JY-075EAIT Datasheet, PDF (28/358 Pages) Micron Technology – 8Gb: x4, x8, x16 DDR4 SDRAM

8Gb: x8, x16 Automotive DDR4 SDRAM
State Diagram
State Diagram
This simplified state diagram provides an overview of the possible state transitions and
the commands to control them. Situations involving more than one bank, the enabling
or disabling of on-die termination, and some other events are not captured in full de-
tail.
Figure 8: Simplified State Diagram
MPSM
IV_REFDQ,
R_TT, and
so on
From any state ^{RESET SRX* = SRX with NOP}
SRX*
MRS
Power
applied
Power-On
RESET
TEN = 1
Reset
procedure
Initialization
MRS
SRX*
PDA
mode
MRS, MPR,
write leveling,
V_REFDQ training
TEN = 1
ZQCL
MRS
MRS ^MRS
MRS
SRE
Connectivity
test
ZQ
calibration ^ZQCL,ZQCS
Idle
REF
TEN = 0
RESET
CKE_L
ACT
PDE
PDX
CKE_L
Self
refresh
SRX
Refreshing
CKE_L
Active
power-
down
PDX
Activating
Precharge
power-
down
PDE
WRITE
Writing
WRITE
Bank
active
READ
WRITE A
WRITE
READ A
READ
READ
Reading
WRITE A
Writing
WRITE A
READ A
PRE, PREA
PRE, PREA
PRE, PREA
READ A
Reading
Precharging
Automatic
sequence
Command
sequence
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
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